Add SPDIF support for Allwinner SoCs

From: Marcus Cooper <[email protected]>

The sun4i, sun6i and sun7i SoC families have an SPDIF block which is capable of playback and capture.

This patch enables the playback of this block for
the sun4i and sun7i families.

Signed-off-by Marcus Cooper <[email protected]>

---
 sound/soc/sunxi/Kconfig       |  12 +
 sound/soc/sunxi/Makefile      |   4 +
 sound/soc/sunxi/sun4i-spdif.c | 612 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 628 insertions(+)
 create mode 100644 sound/soc/sunxi/sun4i-spdif.c

sound/soc/sunxi/Kconfig +2 -0

index 84c72ec..2ebf43d 100644
@@ -8,4 +8,16 @@ config SND_SUN4I_CODEC
 	  Select Y or M to add support for the Codec embedded in the Allwinner
 	  A10 and affiliated SoCs.
 
+config SND_SOC_SUNXI_DAI_SPDIF
+        tristate

sound/soc/sunxi/Kconfig +68 -0

+}
+
+static void sun4i_spdif_shutdown(struct snd_pcm_substream *substream,
+				struct snd_soc_dai *dai)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(rtd->cpu_dai);
+
+	if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
+		return;
+
+	clk_disable_unprepare(host->clk);
+}
+
+static int sun4i_spdif_hw_params(struct snd_pcm_substream *substream,
+				struct snd_pcm_hw_params *params,
+				struct snd_soc_dai *cpu_dai)
+{
+	int ret = 0;
+	int fmt;
+	unsigned long rate = params_rate(params);
+	u32 mclk_div = 0;
+	unsigned int mclk = 0;
+	u32 reg_val;
+	struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(cpu_dai);
+	struct platform_device *pdev = host->pdev;
+
+	/* Add the PCM and raw data select interface */
+	switch (params_channels(params)) {
+	case 1: /* PCM mode */
+	case 2:
+		fmt = 0;
+		break;
+	case 4: /* raw data mode */
+		fmt = SUN4I_SPDIF_TXCFG_NONAUDIO;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	switch (params_format(params)) {
+	case SNDRV_PCM_FORMAT_S16_LE:
+		fmt |= SUN4I_SPDIF_TXCFG_FMT16BIT;
+		break;
+	case SNDRV_PCM_FORMAT_S20_3LE:
+		fmt |= SUN4I_SPDIF_TXCFG_FMT20BIT;
+		break;
+	case SNDRV_PCM_FORMAT_S24_LE:
+		fmt |= SUN4I_SPDIF_TXCFG_FMT24BIT;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	switch (rate) {
+	case 22050:
+	case 44100:
+	case 88200:
+	case 176400:
+		mclk = 22579200;
+		break;
+	case 24000:
+	case 32000:
+	case 48000:
+	case 96000:
+	case 192000:
+		mclk = 24576000;
+		break;

sound/soc/sunxi/Kconfig +5 -0

+
+	ret = clk_set_rate(host->clk, mclk);
+	if (ret < 0) {
+		dev_err(&pdev->dev,
+			"Setting SPDIF clock rate for %d Hz failed!\n", mclk);

From: Marcus Cooper <[email protected]>

Add devicetree bindings for the SPDIF transceiver found on found on Allwinners A10, A20 and A31 SoCs.

Signed-off-by Marcus Cooper <[email protected]>

---
 .../devicetree/bindings/sound/sunxi,spdif.txt      | 49 ++++++++++++++++++++++
 1 file changed, 49 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/sound/sunxi,spdif.txt

Documentation/devicetree/bindings/sound/sunxi,spdif.txt new file +2 -0

new file mode 100644
index 0000000..1868722
@@ -0,0 +1,49 @@
+Allwinner Sony/Philips Digital Interface Format (S/PDIF) Controller
+

Documentation/devicetree/bindings/sound/sunxi,spdif.txt line 12

Quoted 5 lines

Documentation/devicetree/bindings/sound/sunxi,spdif.txt new file +5 -0

+
+  - compatible               : should be one of the following:
+    - "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
+    - "allwinner,sun7i-a20-spdif": for the Allwinner A20 SoC
+    - "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC

Are all these compatibles really work? Is there any significant difference between the controller on all these SoCs?

Thanks,
Maxime

--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

Quoted 6 lines

sound/soc/sunxi/Kconfig +6 -0

+config SND_SOC_SUNXI_DAI_SPDIF
+        tristate
+     depends on OF
+        select SND_SOC_GENERIC_DMAENGINE_PCM
+        select REGMAP_MMIO
+

sound/soc/sunxi/Kconfig config SND_SUN4I_CODEC · line 22

Quoted 6 lines

sound/soc/sunxi/Kconfig +6 -0

+config SND_SOC_SUNXI_MACHINE_SPDIF
+        tristate "APB on-chip sun4i/sun5i/sun7i SPDIF"
+     depends on OF
+        select SND_SOC_SUNXI_DAI_SPDIF
+        help
+          Say Y if you want to add support for SoC S/PDIF audio as simple audio card.

You still haven't said why you can't use simple-card...

sound/soc/sunxi/sun4i-spdif.c line 192

Quoted 11 lines

sound/soc/sunxi/sun4i-spdif.c new file +10 -0

+static void sun4i_spdif_configure(struct sun4i_spdif_dev *host)
+{
+     u32 reg_val;
+
+     /* soft reset SPDIF */
+     regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RESET);
+
+     /* MCLK OUTPUT enable */
+     regmap_update_bits(host->regmap, SUN4I_SPDIF_CTL,
+                     SUN4I_SPDIF_CTL_MCLKOUTEN, SUN4I_SPDIF_CTL_MCLKOUTEN);

The alignment is still not right....

sound/soc/sunxi/sun4i-spdif.c line 200

Quoted 8 lines

sound/soc/sunxi/sun4i-spdif.c new file +7 -0

+     /* flush TX FIFO */
+     regmap_update_bits(host->regmap, SUN4I_SPDIF_FCTL,
+                     SUN4I_SPDIF_FCTL_FTX, SUN4I_SPDIF_FCTL_FTX);
+
+     /* clear interrupt status */
+     regmap_read(host->regmap, SUN4I_SPDIF_ISTA, &reg_val);
+     regmap_write(host->regmap, SUN4I_SPDIF_ISTA, reg_val);

You're not using any interrupts. Why is this needed?

sound/soc/sunxi/sun4i-spdif.c line 258

Quoted 13 lines

sound/soc/sunxi/sun4i-spdif.c new file +12 -0

+static int sun4i_spdif_startup(struct snd_pcm_substream *substream,
+                             struct snd_soc_dai *cpu_dai)
+{
+     struct snd_soc_pcm_runtime *rtd = substream->private_data;
+     struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(rtd->cpu_dai);
+
+     if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
+             return -EINVAL;
+
+     sun4i_spdif_configure(host);
+
+     return clk_prepare_enable(host->clk);

You're still not using pm_runtime...

sound/soc/sunxi/sun4i-spdif.c line 336

Quoted 8 lines

sound/soc/sunxi/sun4i-spdif.c new file +7 -0

+
+     ret = clk_set_rate(host->audio_clk, mclk);
+     if (ret < 0) {
+             dev_err(&pdev->dev,
+                     "Setting pll2 clock rate for %d Hz failed!\n", mclk);
+             return ret;
+     }

You're still using the PLL2...

Quoted 10 lines

sound/soc/sunxi/sun4i-spdif.c new file +9 -0

+
+     ret = clk_set_rate(host->clk, mclk);
+     if (ret < 0) {
+             dev_err(&pdev->dev,
+                     "Setting SPDIF clock rate for %d Hz failed!\n", mclk);
+             return ret;
+     }
+
+     reg_val = 0;

sound/soc/sunxi/sun4i-spdif.c line 351

Quoted 6 lines

sound/soc/sunxi/sun4i-spdif.c new file +6 -0

+     reg_val &= ~SUN4I_SPDIF_FCTL_FIFOSRC;
+     reg_val |= SUN4I_SPDIF_FCTL_TXTL_MASK;
+     reg_val |= SUN4I_SPDIF_FCTL_RXTL_MASK;
+     reg_val |= SUN4I_SPDIF_FCTL_TXIM;
+     reg_val |= SUN4I_SPDIF_FCTL_RXOM_MASK;
+     regmap_write(host->regmap, SUN4I_SPDIF_FCTL, reg_val);

You're still not using regmap_update_bits...

IF you're really going to ignore all the comments we did, please tell us upfront. That way, we will not waste our time doing a review of your patches.

Maxime

--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

Quoted 8 lines

Documentation/devicetree/bindings/sound/sunxi,spdif.txt line 12

Quoted 5 lines

Documentation/devicetree/bindings/sound/sunxi,spdif.txt new file +5 -0

+
+  - compatible               : should be one of the following:
+    - "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
+    - "allwinner,sun7i-a20-spdif": for the Allwinner A20 SoC
+    - "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC

Are all these compatibles really work? Is there any significant difference between the controller on all these SoCs?

Let us assume that there isn't any difference. Remember SPDIF details for all of these devices is sketchy. In the A10 User Manual, it's not even mentioned although devices such as the Mele A2000 which I use come with the physical connector. It's only when the A20 Manual was released that we see the pin details and related components. We didn't see a SPDIF block spec until the H3 User Manual was released.

Looking at the SDK code I've only seen fifo level settings to be different for the sun6i family. It was this release that also showed Rx rotines. The fact of the matter is we won't know until these SoCs have been tested and with that in mind I'm happy to remove all capabilities for now until then.

Quoted 16 lines · Code Kipper

Quoted 8 lines

Documentation/devicetree/bindings/sound/sunxi,spdif.txt line 12

Quoted 5 lines

Documentation/devicetree/bindings/sound/sunxi,spdif.txt new file +5 -0

+
+  - compatible               : should be one of the following:
+    - "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
+    - "allwinner,sun7i-a20-spdif": for the Allwinner A20 SoC
+    - "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC

Are all these compatibles really work? Is there any significant difference between the controller on all these SoCs?

Let us assume that there isn't any difference. Remember SPDIF details for all of these devices is sketchy. In the A10 User Manual, it's not even mentioned although devices such as the Mele A2000 which I use come with the physical connector. It's only when the A20 Manual was released that we see the pin details and related components. We didn't see a SPDIF block spec until the H3 User Manual was released.

Quoted 5 lines

Looking at the SDK code I've only seen fifo level settings to be different for the sun6i family. It was this release that also showed Rx rotines. The fact of the matter is we won't know until these SoCs have been tested and with that in mind I'm happy to remove all capabilities for now until then.

The point was more that you document compatibles that you are not actually supporting.

You've only tested it on one SoC (and it actually works only on one SoC, or at least with one compatible), so only document that.

Maxime

--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

Quoted 6 lines

Quoted 6 lines

sound/soc/sunxi/Kconfig +6 -0

+config SND_SOC_SUNXI_DAI_SPDIF
+        tristate
+     depends on OF
+        select SND_SOC_GENERIC_DMAENGINE_PCM
+        select REGMAP_MMIO
+

Quoted 8 lines

sound/soc/sunxi/Kconfig config SND_SUN4I_CODEC · line 22

Quoted 6 lines

sound/soc/sunxi/Kconfig +6 -0

+config SND_SOC_SUNXI_MACHINE_SPDIF
+        tristate "APB on-chip sun4i/sun5i/sun7i SPDIF"
+     depends on OF
+        select SND_SOC_SUNXI_DAI_SPDIF
+        help
+          Say Y if you want to add support for SoC S/PDIF audio as simple audio card.

You still haven't said why you can't use simple-card...

I mentioned in the covering letter that I thought that simple-card was overkill.

There is also a thread concerning issues with the ordering of module bringup here
http://mailman.alsa-project.org/pipermail/alsa-devel/2013-December/070534.html.
I was initially trying to use the dummy spdif transmitter but couldn't get it working, this set up works for me. I haven't got an audio guy sitting next to me to ping and have reached out for some guidance. I can do this using simple-card, it just with all the driver refactoring it was the main place where I thought things would break.

Quoted 4 lines

Quoted 4 lines

sound/soc/sunxi/sun4i-spdif.c new file +4 -0

+static void sun4i_spdif_configure(struct sun4i_spdif_dev *host)
+{
+     u32 reg_val;
+

Quoted 8 lines

sound/soc/sunxi/sun4i-spdif.c line 192

Quoted 6 lines

sound/soc/sunxi/sun4i-spdif.c new file +6 -0

+     /* soft reset SPDIF */
+     regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RESET);
+
+     /* MCLK OUTPUT enable */
+     regmap_update_bits(host->regmap, SUN4I_SPDIF_CTL,
+                     SUN4I_SPDIF_CTL_MCLKOUTEN, SUN4I_SPDIF_CTL_MCLKOUTEN);

The alignment is still not right....

I'm not even sure if we need mclk output enabled. Let me see what happens when I remove this.

Quoted 6 lines

Quoted 6 lines

sound/soc/sunxi/sun4i-spdif.c new file +6 -0

+static int sun4i_spdif_startup(struct snd_pcm_substream *substream,
+                             struct snd_soc_dai *cpu_dai)
+{
+     struct snd_soc_pcm_runtime *rtd = substream->private_data;
+     struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(rtd->cpu_dai);
+

Quoted 8 lines

sound/soc/sunxi/sun4i-spdif.c line 258

Quoted 6 lines

sound/soc/sunxi/sun4i-spdif.c new file +6 -0

+     if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
+             return -EINVAL;
+
+     sun4i_spdif_configure(host);
+
+     return clk_prepare_enable(host->clk);

You're still not using pm_runtime...

I've removed the pm stuff and this is the same as you have it in sun4i-codec.

Quoted 9 lines

sound/soc/sunxi/sun4i-spdif.c line 336

Quoted 7 lines

sound/soc/sunxi/sun4i-spdif.c new file +7 -0

+
+     ret = clk_set_rate(host->audio_clk, mclk);
+     if (ret < 0) {
+             dev_err(&pdev->dev,
+                     "Setting pll2 clock rate for %d Hz failed!\n", mclk);
+             return ret;
+     }

You're still using the PLL2...

I commented this out and it stopped working...let me check again.

Quoted 11 lines

Quoted 11 lines

sound/soc/sunxi/sun4i-spdif.c new file +9 -0

+
+     ret = clk_set_rate(host->clk, mclk);
+     if (ret < 0) {
+             dev_err(&pdev->dev,
+                     "Setting SPDIF clock rate for %d Hz failed!\n", mclk);
+             return ret;
+     }
+
+     reg_val = 0;

Quoted 8 lines

sound/soc/sunxi/sun4i-spdif.c line 351

Quoted 6 lines

sound/soc/sunxi/sun4i-spdif.c new file +6 -0

+     reg_val &= ~SUN4I_SPDIF_FCTL_FIFOSRC;
+     reg_val |= SUN4I_SPDIF_FCTL_TXTL_MASK;
+     reg_val |= SUN4I_SPDIF_FCTL_RXTL_MASK;
+     reg_val |= SUN4I_SPDIF_FCTL_TXIM;
+     reg_val |= SUN4I_SPDIF_FCTL_RXOM_MASK;
+     regmap_write(host->regmap, SUN4I_SPDIF_FCTL, reg_val);

You're still not using regmap_update_bits...

Why would I need to?, this is the first write to the register before playback and I'm not interested in keeping any of the previous fifo settings. Will remove"reg_val &= ~SUN4I_SPDIF_FCTL_FIFOSRC;" as that's not doing anything.

Quoted 3 lines

IF you're really going to ignore all the comments we did, please tell us upfront. That way, we will not waste our time doing a review of your patches.

All is a strong word....did you even read my covering letter?....there was a major refactoring of the code and I think I covered a majority of the comments. Apologies if you feel that you'd wasted a lot of time of this....it can't be any more that the EVB dts.

Quoted 15 lines · Code Kipper

Quoted 6 lines

Quoted 6 lines

sound/soc/sunxi/Kconfig +6 -0

+config SND_SOC_SUNXI_DAI_SPDIF
+        tristate
+     depends on OF
+        select SND_SOC_GENERIC_DMAENGINE_PCM
+        select REGMAP_MMIO
+

Quoted 8 lines

sound/soc/sunxi/Kconfig config SND_SUN4I_CODEC · line 22

Quoted 6 lines

sound/soc/sunxi/Kconfig +6 -0

+config SND_SOC_SUNXI_MACHINE_SPDIF
+        tristate "APB on-chip sun4i/sun5i/sun7i SPDIF"
+     depends on OF
+        select SND_SOC_SUNXI_DAI_SPDIF
+        help
+          Say Y if you want to add support for SoC S/PDIF audio as simple audio card.

You still haven't said why you can't use simple-card...

Quoted 2 lines

I mentioned in the covering letter that I thought that simple-card was overkill.

Overkill for what? It adds no code, that will put no new maintainance burden, without any duplication. While your code also adds all that.

Quoted 8 lines

There is also a thread concerning issues with the ordering of module bringup here
http://mailman.alsa-project.org/pipermail/alsa-devel/2013-December/070534.html.
I was initially trying to use the dummy spdif transmitter but couldn't get it working, this set up works for me. I haven't got an audio guy sitting next to me to ping and have reached out for some guidance. I can do this using simple-card, it just with all the driver refactoring it was the main place where I thought things would break.

We're all on IRC.

Quoted 15 lines

Quoted 14 lines

sound/soc/sunxi/sun4i-spdif.c line 192

Quoted 12 lines

sound/soc/sunxi/sun4i-spdif.c new file +10 -0

+static void sun4i_spdif_configure(struct sun4i_spdif_dev *host)
+{
+     u32 reg_val;
+
+     /* soft reset SPDIF */
+     regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RESET);
+
+     /* MCLK OUTPUT enable */
+     regmap_update_bits(host->regmap, SUN4I_SPDIF_CTL,
+                     SUN4I_SPDIF_CTL_MCLKOUTEN, SUN4I_SPDIF_CTL_MCLKOUTEN);

The alignment is still not right....

Quoted 2 lines

I'm not even sure if we need mclk output enabled. Let me see what happens when I remove this.

It's not really the point. The alignment of all your wrapped lines is wrong.

Quoted 16 lines

Quoted 15 lines

sound/soc/sunxi/sun4i-spdif.c line 258

Quoted 13 lines

sound/soc/sunxi/sun4i-spdif.c new file +12 -0

+static int sun4i_spdif_startup(struct snd_pcm_substream *substream,
+                             struct snd_soc_dai *cpu_dai)
+{
+     struct snd_soc_pcm_runtime *rtd = substream->private_data;
+     struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(rtd->cpu_dai);
+
+     if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
+             return -EINVAL;
+
+     sun4i_spdif_configure(host);
+
+     return clk_prepare_enable(host->clk);

You're still not using pm_runtime...

Quoted 2 lines

I've removed the pm stuff and this is the same as you have it in sun4i-codec.

You've removed the suspend code, and both Mark and I asked you to use runtime_pm to handle your bus clock.

And this has also been asked for the codec.

Quoted 9 lines

Quoted 9 lines

Quoted 8 lines

sound/soc/sunxi/sun4i-spdif.c new file +7 -0

+
+     ret = clk_set_rate(host->audio_clk, mclk);
+     if (ret < 0) {
+             dev_err(&pdev->dev,
+                     "Setting pll2 clock rate for %d Hz failed!\n", mclk);
+             return ret;
+     }

Quoted 3 lines

Quoted 1 line

You're still using the PLL2...

I commented this out and it stopped working...let me check again.

Then something is wrong somewhere else that needs to be fixed, either in the clock driver or in this driver. Did you update all the other references to PLL2 as well?

Quoted 21 lines

Quoted 20 lines

Quoted 8 lines

sound/soc/sunxi/sun4i-spdif.c new file +5 -0

+
+     ret = clk_set_rate(host->clk, mclk);
+     if (ret < 0) {
+             dev_err(&pdev->dev,
+                     "Setting SPDIF clock rate for %d Hz failed!\n", mclk);

sound/soc/sunxi/sun4i-spdif.c line 351

Quoted 10 lines

sound/soc/sunxi/sun4i-spdif.c new file +10 -0

+             return ret;
+     }
+
+     reg_val = 0;
+     reg_val &= ~SUN4I_SPDIF_FCTL_FIFOSRC;
+     reg_val |= SUN4I_SPDIF_FCTL_TXTL_MASK;
+     reg_val |= SUN4I_SPDIF_FCTL_RXTL_MASK;
+     reg_val |= SUN4I_SPDIF_FCTL_TXIM;
+     reg_val |= SUN4I_SPDIF_FCTL_RXOM_MASK;
+     regmap_write(host->regmap, SUN4I_SPDIF_FCTL, reg_val);

You're still not using regmap_update_bits...

Quoted 4 lines

Why would I need to?, this is the first write to the register before playback and I'm not interested in keeping any of the previous fifo settings. Will remove"reg_val &= ~SUN4I_SPDIF_FCTL_FIFOSRC;" as that's not doing anything.

Dropping the masking is also an option.

Quoted 9 lines

Quoted 4 lines

IF you're really going to ignore all the comments we did, please tell us upfront. That way, we will not waste our time doing a review of your patches.

All is a strong word....did you even read my covering letter?....there was a major refactoring of the code and I think I covered a majority of the comments. Apologies if you feel that you'd wasted a lot of time of this....it can't be any more that the EVB dts.

The point of this is that this is a discussion. You simply ignored most of the comments, without even mentionning why you wanted to ignore them, and simply sent a new version.

If you feel like one comment is invalid, let's discuss this, like you did here. But silently discarding them is not an option and actually quite rude.

Maxime

--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

Quoted 13 lines

Quoted 13 lines

Quoted 12 lines

sound/soc/sunxi/sun4i-spdif.c line 192

Quoted 10 lines

sound/soc/sunxi/sun4i-spdif.c new file +10 -0

+static void sun4i_spdif_configure(struct sun4i_spdif_dev *host)
+{
+     u32 reg_val;
+
+     /* soft reset SPDIF */
+     regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RESET);
+
+     /* MCLK OUTPUT enable */
+     regmap_update_bits(host->regmap, SUN4I_SPDIF_CTL,
+                     SUN4I_SPDIF_CTL_MCLKOUTEN, SUN4I_SPDIF_CTL_MCLKOUTEN);

The alignment is still not right....

Quoted 5 lines

Quoted 2 lines

I'm not even sure if we need mclk output enabled. Let me see what happens when I remove this.

It's not really the point. The alignment of all your wrapped lines is wrong.

Ahhhh....I was brought up to not mix tabs and spaces and I now see with a quick check that checkpatch doesn't barf...I'll fix this.

Quoted 18 lines

Quoted 17 lines

Quoted 6 lines

Quoted 6 lines

sound/soc/sunxi/sun4i-spdif.c new file +6 -0

+static int sun4i_spdif_startup(struct snd_pcm_substream *substream,
+                             struct snd_soc_dai *cpu_dai)
+{
+     struct snd_soc_pcm_runtime *rtd = substream->private_data;
+     struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(rtd->cpu_dai);
+

Quoted 8 lines

sound/soc/sunxi/sun4i-spdif.c line 258

Quoted 6 lines

sound/soc/sunxi/sun4i-spdif.c new file +6 -0

+     if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
+             return -EINVAL;
+
+     sun4i_spdif_configure(host);
+
+     return clk_prepare_enable(host->clk);

You're still not using pm_runtime...

I've removed the pm stuff and this is the same as you have it in sun4i-codec.

Quoted 4 lines

You've removed the suspend code, and both Mark and I asked you to use runtime_pm to handle your bus clock.

And this has also been asked for the codec.

You asked if I had tested the pm operations which I hadn't so I removed them after looking at your driver and searching for pm_runtime usage elsewhere in sound/soc. I will add them back.