Patch "drm/i915: Restore lost DPLL register write on gen2-4" has been added to the 3.14-stable tree

This is a note to let you know that I've just added the patch titled

drm/i915: Restore lost DPLL register write on gen2-4

to the 3.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:

     drm-i915-restore-lost-dpll-register-write-on-gen2-4.patch

and it can be found in the queue-3.14 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <[email protected]>
Date: Wed, 7 Oct 2015 22:08:24 +0300
Subject: drm/i915: Restore lost DPLL register write on gen2-4
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From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <[email protected]>

commit 8e7a65aa70bcc1235a44e40ae0da5056525fe081 upstream.

We accidentally lost the initial DPLL register write in 1c4e02746147 drm/i915: Fix DVO 2x clock enable on 830M

The "three times for luck" hack probably saved us from a total disaster. But anyway, bring the initial write back so that the code actually makes some sense.

References: http://mid.gmane.org/CAN_QmVyMaArxYgEcVVsGvsMo7-6ohZr8HmF5VhkkL4i9KOmrhw@mail.gmail.com

---
 drivers/gpu/drm/i915/intel_display.c |    2 ++
 1 file changed, 2 insertions(+)

@@ -1451,6 +1451,8 @@ static void i9xx_enable_pll(struct intel
 
 	I915_WRITE(reg, dpll);
 
+	I915_WRITE(reg, dpll);
+
 	/* Wait for the clocks to stabilize. */
 	POSTING_READ(reg);
 	udelay(150);

Patches currently in stable-queue which might be from [email protected] are

queue-3.14/drm-i915-restore-lost-dpll-register-write-on-gen2-4.patch