Add support for MSM8996 clock controllers
cover Add support for MSM8996 clock controllers
These patches add support for the global and multimedia clock controllers found on MSM8996 devices. The first patch allows us to implement a "power of two" divider of different widths with a table based divider. The second patch adds support for Alpha PLLs and the 3rd and 5th patches add support for the two clock controllers. The fourth patch is a new type of clock ops for the graphics clock that does some custom ping-pong between different PLLs when switching graphics frequencies.
Some work is still pending, mostly adding GDSCs and configuring the multimedia PLLs for FSM voting mode vs. manually enabling and disabling them. So a v2 is probably going to come out after some more testing is done.
Stephen Boyd (5):
clk: divider: Cap table divider values to 'width' member
clk: qcom: Add Alpha PLL support
clk: qcom: Add MSM8996 Global Clock Control (GCC) driver
clk: qcom: Add gfx3d ping-pong PLL frequency switching
clk: qcom: Add MSM8996 Multimedia Clock Controller (MMCC) driver
.../devicetree/bindings/clock/qcom,gcc.txt | 1 + .../devicetree/bindings/clock/qcom,mmcc.txt | 1 + drivers/clk/clk-divider.c | 9 +- drivers/clk/qcom/Kconfig | 17 + drivers/clk/qcom/Makefile | 3 + drivers/clk/qcom/clk-alpha-pll.c | 355 +++ drivers/clk/qcom/clk-alpha-pll.h | 57 + drivers/clk/qcom/clk-rcg.h | 1 + drivers/clk/qcom/clk-rcg2.c | 87 + drivers/clk/qcom/gcc-msm8996.c | 3332 ++++++++++++++++++++ drivers/clk/qcom/mmcc-msm8996.c | 3209 +++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-msm8996.h | 333 ++ include/dt-bindings/clock/qcom,mmcc-msm8996.h | 285 ++ 13 files changed, 7686 insertions(+), 4 deletions(-) create mode 100644 drivers/clk/qcom/clk-alpha-pll.c create mode 100644 drivers/clk/qcom/clk-alpha-pll.h create mode 100644 drivers/clk/qcom/gcc-msm8996.c create mode 100644 drivers/clk/qcom/mmcc-msm8996.c create mode 100644 include/dt-bindings/clock/qcom,gcc-msm8996.h create mode 100644 include/dt-bindings/clock/qcom,mmcc-msm8996.h
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PATCH 1/5 clk: divider: Cap table divider values to 'width' member
When we use a clk divider with a divider table, we limit the maximum divider value in divider_get_val() to the div_mask(width), but when we calculate the divider in divider_round_rate() we don't consider that the maximum divider may be limited by the width. Pass the width along to _get_table_maxdiv() so that we only return the maximum divider that is valid. This is useful for clocks that want to share the same divider table while limiting the available dividers to some subset of the table depending on the width of the bitfield.
--- drivers/clk/clk-divider.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
drivers/clk/clk-divider.c +5 -4
@@ -32,13 +32,14 @@#define div_mask (width) ((1 << (width)) - 1) -static unsigned int _get_table_maxdiv (const struct clk_div_table *table) +static unsigned int _get_table_maxdiv (const struct clk_div_table *table, +u8 width) { -unsigned int maxdiv =0 ; +unsigned int maxdiv =0 , mask =div_mask (width);const struct clk_div_table *clkt;for (clkt = table; clkt->div; clkt++) -if (clkt->div > maxdiv) +if (clkt->div > maxdiv && clkt->val <= mask) maxdiv = clkt->div;return maxdiv; }
@@ -62,7 +63,7 @@ static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width,if (flags &CLK_DIVIDER_POWER_OF_TWO )return 1 <<div_mask (width);if (table) -return _get_table_maxdiv (table); +return _get_table_maxdiv (table, width);return div_mask (width) +1 ; }
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PATCH 2/5 clk: qcom: Add Alpha PLL support
In reply to Stephen BoydAdd support for configuring rates of, enabling, and disabling Alpha PLLs. This is sufficient for the types of PLLs found in the global and multimedia clock controllers.
--- drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-alpha-pll.c | 355 +++++++++++++++++++++++++++++++++++++++ drivers/clk/qcom/clk-alpha-pll.h | 57 +++++++ 3 files changed, 413 insertions(+) create mode 100644 drivers/clk/qcom/clk-alpha-pll.c create mode 100644 drivers/clk/qcom/clk-alpha-pll.h
drivers/clk/qcom/Makefile +1 -0
@@ -2,6 +2,7 @@ obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o clk-qcom-y += common.o clk-qcom-y += clk-regmap.o +clk-qcom-y += clk-alpha-pll.o clk-qcom-y += clk-pll.o clk-qcom-y += clk-rcg.o clk-qcom-y += clk-rcg2.o
drivers/clk/qcom/clk-alpha-pll.c new file +355 -0
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drivers/clk/qcom/clk-alpha-pll.h new file +57 -0
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PATCH 3/5 clk: qcom: Add MSM8996 Global Clock Control (GCC) driver
In reply to Stephen BoydAdd support for the global clock controller found on MSM8996 based devices. This should allow most non-multimedia device drivers to probe and control their clocks.
--- .../devicetree/bindings/clock/qcom,gcc.txt | 1 + drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-msm8996.c | 3332 ++++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-msm8996.h | 333 ++ 5 files changed, 3675 insertions(+) create mode 100644 drivers/clk/qcom/gcc-msm8996.c create mode 100644 include/dt-bindings/clock/qcom,gcc-msm8996.h
Documentation/devicetree/bindings/clock/qcom,gcc.txt +1 -0
@@ -13,6 +13,7 @@ Required properties : "qcom,gcc-msm8974" "qcom,gcc-msm8974pro" "qcom,gcc-msm8974pro-ac" + "qcom,gcc-msm8996" - reg : shall contain base register location and length - #clock-cells : shall contain 1
drivers/clk/qcom/Kconfig +8 -0
@@ -106,3 +106,11 @@ config MSM_MMCC_8974 Support for the multimedia clock controller on msm8974 devices. Say Y if you want to support multimedia devices such as display, graphics, video encode/decode, camera, etc. + +config MSM_GCC_8996 + tristate "MSM8996 Global Clock Controller" + depends on COMMON_CLK_QCOM + help + Support for the global clock controller on msm8996 devices. + Say Y if you want to use peripheral devices such as UART, SPI, + i2c, USB, UFS, SD/eMMC, PCIe, etc.
drivers/clk/qcom/Makefile +1 -0
@@ -21,5 +21,6 @@ obj-$(CONFIG_MSM_GCC_8916) += gcc-msm8916.o obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o obj-$(CONFIG_MSM_LCC_8960) += lcc-msm8960.o obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o +obj-$(CONFIG_MSM_GCC_8996) += gcc-msm8996.o obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
drivers/clk/qcom/gcc-msm8996.c new file +3332 -0
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include/dt-bindings/clock/qcom,gcc-msm8996.h new file +333 -0
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PATCH 4/5 clk: qcom: Add gfx3d ping-pong PLL frequency switching
In reply to Stephen BoydThe GPU clocks on msm8996 have three dedicated PLLs, MMPLL2, MMPLL8, and MMPLL9. We leave MMPLL9 at the maximum speed (624 MHz), and we use MMPLL2 and MMPLL8 for the other frequencies. To make switching frequencies faster, we ping-pong between MMPLL2 and MMPLL8 when we're switching between frequencies that aren't the maximum. Implement custom rcg clk ops for this type of frequency switching.
--- drivers/clk/qcom/clk-rcg.h | 1 + drivers/clk/qcom/clk-rcg2.c | 87 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 88 insertions(+)
drivers/clk/qcom/clk-rcg.h +1 -0
@@ -178,5 +178,6 @@ extern const struct clk_ops clk_edp_pixel_ops;extern const struct clk_ops clk_byte_ops;extern const struct clk_ops clk_byte2_ops;extern const struct clk_ops clk_pixel_ops; +extern const struct clk_ops clk_gfx3d_ops;#endif
drivers/clk/qcom/clk-rcg2.c +87 -0
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PATCH 5/5 clk: qcom: Add MSM8996 Multimedia Clock Controller (MMCC) driver
In reply to Stephen BoydAdd a driver for the multimedia clock controller found on MSM8996 based devices. This should allow most multimedia device drivers to probe and control their clocks.
--- .../devicetree/bindings/clock/qcom,mmcc.txt | 1 + drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/mmcc-msm8996.c | 3209 ++++++++++++++++++++ include/dt-bindings/clock/qcom,mmcc-msm8996.h | 285 ++ 5 files changed, 3505 insertions(+) create mode 100644 drivers/clk/qcom/mmcc-msm8996.c create mode 100644 include/dt-bindings/clock/qcom,mmcc-msm8996.h
Documentation/devicetree/bindings/clock/qcom,mmcc.txt +1 -0
@@ -9,6 +9,7 @@ Required properties : "qcom,mmcc-msm8660" "qcom,mmcc-msm8960" "qcom,mmcc-msm8974" + "qcom,mmcc-msm8996" - reg : shall contain base register location and length - #clock-cells : shall contain 1
drivers/clk/qcom/Kconfig +9 -0
@@ -114,3 +114,12 @@ config MSM_GCC_8996 Support for the global clock controller on msm8996 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, UFS, SD/eMMC, PCIe, etc. + +config MSM_MMCC_8996 + tristate "MSM8996 Multimedia Clock Controller" + select MSM_GCC_8996 + depends on COMMON_CLK_QCOM + help + Support for the multimedia clock controller on msm8996 devices. + Say Y if you want to support multimedia devices such as display, + graphics, video encode/decode, camera, etc.
drivers/clk/qcom/Makefile +1 -0
@@ -24,3 +24,4 @@ obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o obj-$(CONFIG_MSM_GCC_8996) += gcc-msm8996.o obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o +obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
drivers/clk/qcom/mmcc-msm8996.c new file +3209 -0
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include/dt-bindings/clock/qcom,mmcc-msm8996.h new file +285 -0
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Re: [PATCH 5/5] clk: qcom: Add MSM8996 Multimedia Clock Controller (MMCC) driver
Quoted 37 lines · Stephen Boyd
drivers/clk/qcom/mmcc-msm8996.c new file +37
-0+static struct clk_alpha_pll mmpll0_early = { + .offset =0x0 , + .vco_table = mmpll_p_vco, + .num_vco =ARRAY_SIZE (mmpll_p_vco), + .clkr.hw.init = &(struct clk_init_data ){ + .name ="mmpll0_early" , + .parent_names = (const char *[]){"xo" }, + .num_parents =1 , + .ops = &clk_alpha_pll_ops, + }, +}; + +static struct clk_alpha_pll_postdiv mmpll0 = { + .offset =0x0 , + .width =4 , + .clkr.hw.init = &(struct clk_init_data ){ + .name ="mmpll0" , + .parent_names = (const char *[]){"mmpll0_early" }, + .num_parents =1 , + .ops = &clk_alpha_pll_postdiv_ops, + .flags =CLK_SET_RATE_PARENT , + }, +}; + +static struct clk_alpha_pll mmpll1_early = { + .offset =0x30 , + .vco_table = mmpll_p_vco, + .num_vco =ARRAY_SIZE (mmpll_p_vco), + .clkr.hw.init = &(struct clk_init_data ){ + .name ="mmpll1_early" , + .parent_names = (const char *[]){"xo" }, + .num_parents =1 , + .ops = &clk_alpha_pll_ops, + }, +}; + +static struct clk_alpha_pll_postdiv mmpll1 = {
drivers/clk/qcom/mmcc-msm8996.c line 313
Quoted 10 lines
drivers/clk/qcom/mmcc-msm8996.c new file +10
-0+ .offset = 0x30, + .width = 4, + .clkr.hw.init = &(struct clk_init_data ){ + .name ="mmpll1" , + .parent_names = (const char *[]){"mmpll1_early" }, + .num_parents =1 , + .ops = &clk_alpha_pll_postdiv_ops, + .flags =CLK_SET_RATE_PARENT , + }, +};
These are missing the .enable_reg and .enable_mask members to do the proper FSM voting. I'll add that in v2.
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Quoted 9 lines · Stephen Boyd
These patches add support for the global and multimedia clock controllers found on MSM8996 devices. The first patch allows us to implement a "power of two" divider of different widths with a table based divider. The second patch adds support for Alpha PLLs and the 3rd and 5th patches add support for the two clock controllers. The fourth patch is a new type of clock ops for the graphics clock that does some custom ping-pong between different PLLs when switching graphics frequencies.
Some work is still pending, mostly adding GDSCs and configuring the
I have the GDSC support patches done on top. Will post once I get some reasonable testing done.
Quoted 34 lines
multimedia PLLs for FSM voting mode vs. manually enabling and disabling them. So a v2 is probably going to come out after some more testing is done.
Cc Rajendra Nayak <[email protected]>Stephen Boyd (5):
clk: divider: Cap table divider values to 'width' member
clk: qcom: Add Alpha PLL support
clk: qcom: Add MSM8996 Global Clock Control (GCC) driver
clk: qcom: Add gfx3d ping-pong PLL frequency switching
clk: qcom: Add MSM8996 Multimedia Clock Controller (MMCC) driver.../devicetree/bindings/clock/qcom,gcc.txt | 1 + .../devicetree/bindings/clock/qcom,mmcc.txt | 1 + drivers/clk/clk-divider.c | 9 +- drivers/clk/qcom/Kconfig | 17 + drivers/clk/qcom/Makefile | 3 + drivers/clk/qcom/clk-alpha-pll.c | 355 +++ drivers/clk/qcom/clk-alpha-pll.h | 57 + drivers/clk/qcom/clk-rcg.h | 1 + drivers/clk/qcom/clk-rcg2.c | 87 + drivers/clk/qcom/gcc-msm8996.c | 3332 ++++++++++++++++++++ drivers/clk/qcom/mmcc-msm8996.c | 3209 +++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-msm8996.h | 333 ++ include/dt-bindings/clock/qcom,mmcc-msm8996.h | 285 ++ 13 files changed, 7686 insertions(+), 4 deletions(-) create mode 100644 drivers/clk/qcom/clk-alpha-pll.c create mode 100644 drivers/clk/qcom/clk-alpha-pll.h create mode 100644 drivers/clk/qcom/gcc-msm8996.c create mode 100644 drivers/clk/qcom/mmcc-msm8996.c create mode 100644 include/dt-bindings/clock/qcom,gcc-msm8996.h create mode 100644 include/dt-bindings/clock/qcom,mmcc-msm8996.h
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