Patch "KVM: x86: allow RSM from 64-bit mode" has been added to the 4.2-stable tree

This is a note to let you know that I've just added the patch titled

KVM: x86: allow RSM from 64-bit mode

to the 4.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:

     kvm-x86-allow-rsm-from-64-bit-mode.patch

and it can be found in the queue-4.2 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Paolo Bonzini <[email protected]>
Date: Tue, 3 Nov 2015 13:43:05 +0100
Subject: KVM: x86: allow RSM from 64-bit mode
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From: Paolo Bonzini <[email protected]>

commit 89651a3decbe03754f304a0b248f27eeb9a37937 upstream.

The SDM says that exiting system management mode from 64-bit mode is invalid, but that would be too good to be true. But actually, most of the code is already there to support exiting from compat mode (EFER.LME=1, EFER.LMA=0). Getting all the way from 64-bit mode to real mode only requires clearing CS.L and CR4.PCIDE.

---
 arch/x86/kvm/emulate.c |   30 +++++++++++++++++++++++++-----
 1 file changed, 25 insertions(+), 5 deletions(-)

@@ -2484,16 +2484,36 @@ static int em_rsm(struct x86_emulate_ctx
 
 	/*
 	 * Get back to real mode, to prepare a safe state in which to load
-	 * CR0/CR3/CR4/EFER.
-	 *
-	 * CR4.PCIDE must be zero, because it is a 64-bit mode only feature.
+	 * CR0/CR3/CR4/EFER.  It's all a bit more complicated if the vCPU
+	 * supports long mode.
 	 */
+	cr4 = ctxt->ops->get_cr(ctxt, 4);
+	if (emulator_has_longmode(ctxt)) {
+		struct desc_struct cs_desc;
+
+		/* Zero CR4.PCIDE before CR0.PG.  */
+		if (cr4 & X86_CR4_PCIDE) {
+			ctxt->ops->set_cr(ctxt, 4, cr4 & ~X86_CR4_PCIDE);
+			cr4 &= ~X86_CR4_PCIDE;
+		}
+
+		/* A 32-bit code segment is required to clear EFER.LMA.  */
+		memset(&cs_desc, 0, sizeof(cs_desc));
+		cs_desc.type = 0xb;
+		cs_desc.s = cs_desc.g = cs_desc.p = 1;
+		ctxt->ops->set_segment(ctxt, 0, &cs_desc, 0, VCPU_SREG_CS);
+	}
+
+	/* For the 64-bit case, this will clear EFER.LMA.  */
 	cr0 = ctxt->ops->get_cr(ctxt, 0);
 	if (cr0 & X86_CR0_PE)
 		ctxt->ops->set_cr(ctxt, 0, cr0 & ~(X86_CR0_PG | X86_CR0_PE));
-	cr4 = ctxt->ops->get_cr(ctxt, 4);
+
+	/* Now clear CR4.PAE (which must be done before clearing EFER.LME).  */
 	if (cr4 & X86_CR4_PAE)
 		ctxt->ops->set_cr(ctxt, 4, cr4 & ~X86_CR4_PAE);
+
+	/* And finally go back to 32-bit mode.  */
 	efer = 0;
 	ctxt->ops->set_msr(ctxt, MSR_EFER, efer);
 

@@ -4454,7 +4474,7 @@ static const struct opcode twobyte_table
 	F(DstMem | SrcReg | Src2CL | ModRM, em_shld), N, N,
 	/* 0xA8 - 0xAF */
 	I(Stack | Src2GS, em_push_sreg), I(Stack | Src2GS, em_pop_sreg),
-	II(No64 | EmulateOnUD | ImplicitOps, em_rsm, rsm),
+	II(EmulateOnUD | ImplicitOps, em_rsm, rsm),
 	F(DstMem | SrcReg | ModRM | BitOp | Lock | PageTable, em_bts),
 	F(DstMem | SrcReg | Src2ImmByte | ModRM, em_shrd),
 	F(DstMem | SrcReg | Src2CL | ModRM, em_shrd),

Patches currently in stable-queue which might be from [email protected] are

queue-4.2/kvm-x86-set-kvm_req_event-when-updating-irr.patch queue-4.2/mips-kvm-fix-cache-immediate-offset-sign-extension.patch queue-4.2/kvm-x86-handle-smbase-as-physical-address-in-rsm.patch queue-4.2/kvm-x86-obey-kvm_x86_quirk_cd_nw_cleared-in-kvm_set_cr0.patch queue-4.2/mips-kvm-fix-asid-restoration-logic.patch queue-4.2/kvm-x86-zero-efer-on-init.patch queue-4.2/x86-setup-fix-low-identity-map-for-2gb-kernel-range.patch queue-4.2/x86-fpu-fix-get_xsave_addr-behavior-under-virtualization.patch queue-4.2/kvm-x86-allow-rsm-from-64-bit-mode.patch queue-4.2/x86-setup-extend-low-identity-map-to-cover-whole-kernel-range.patch queue-4.2/kvm-x86-add-read_phys-to-x86_emulate_ops.patch queue-4.2/kvm-x86-work-around-infinite-loop-in-microcode-when-ac-is-delivered.patch queue-4.2/mips-kvm-uninit-vcpu-in-vcpu_create-error-path.patch