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x86/platform/intel-mid: enable 64-bit build

PATCH New Andy Shevchenko 2 participants 4 messages Jan 15, 2016 – Jan 19, 2016

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#0 lore raw

PATCH 1/2 x86/platform/intel-mid: enable 64-bit build

Intel Tangier SoC is known to have 64-bit dual core CPU. Enable 64-bit build for it.

The kernel has been tested on Intel Edison board.

Linux buildroot 4.4.0-next-20160115+ #25 SMP Fri Jan 15 22:03:19 EET 2016 x86_64 GNU/Linux

processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 74
model name : Genuine Intel(R) CPU 4000 @ 500MHz
stepping : 8

---
 arch/x86/Kconfig         | 3 +--
 arch/x86/kernel/head64.c | 8 ++++++++
 2 files changed, 9 insertions(+), 2 deletions(-)
arch/x86/Kconfig +1 -2
index ebb810f..0ebc19a 100644
@@ -510,11 +510,10 @@ config X86_INTEL_CE
 
 config X86_INTEL_MID
 	bool "Intel MID platform support"
-	depends on X86_32
 	depends on X86_EXTENDED_PLATFORM
 	depends on X86_PLATFORM_DEVICES
 	depends on PCI
-	depends on PCI_GOANY
+	depends on X86_64 || (PCI_GOANY && X86_32)
 	depends on X86_IO_APIC
 	select SFI
 	select I2C
arch/x86/kernel/head64.c +8 -0
index f129a9a..2c0f340 100644
@@ -192,5 +192,13 @@ void __init x86_64_start_reservations(char *real_mode_data)
 
 	reserve_ebda_region();
 
+	switch (boot_params.hdr.hardware_subarch) {
+	case X86_SUBARCH_INTEL_MID:
+		x86_intel_mid_early_setup();
+		break;
+	default:
+		break;
+	}
+
 	start_kernel();
 }
Signature · 1 line
2.7.0.rc3
#1 lore raw

PATCH 2/2 x86/platform/intel-mid: Join string and fix SoC name

Join string back to make grepping a bit easier. While here, lowering case for Penwell SoC name in one case to be aligned with the rest messages.

---
 arch/x86/platform/intel-mid/intel-mid.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)
arch/x86/platform/intel-mid/intel-mid.c +3 -5
index 1bbc21e..90bb997 100644
@@ -138,7 +138,7 @@ static void intel_mid_arch_setup(void)
 		intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip]();
 	else {
 		intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL]();
-		pr_info("ARCH: Unknown SoC, assuming PENWELL!\n");
+		pr_info("ARCH: Unknown SoC, assuming Penwell!\n");
 	}
 
 out:
@@ -214,12 +214,10 @@ static inline int __init setup_x86_intel_mid_timer(char *arg)
 	else if (strcmp("lapic_and_apbt", arg) == 0)
 		intel_mid_timer_options = INTEL_MID_TIMER_LAPIC_APBT;
 	else {
-		pr_warn("X86 INTEL_MID timer option %s not recognised"
-			   " use x86_intel_mid_timer=apbt_only or lapic_and_apbt\n",
-			   arg);
+		pr_warn("X86 INTEL_MID timer option %s not recognised use x86_intel_mid_timer=apbt_only or lapic_and_apbt\n",
+			arg);
 		return -EINVAL;
 	}
 	return 0;
 }
 __setup("x86_intel_mid_timer=", setup_x86_intel_mid_timer);
-
Signature · 1 line
2.7.0.rc3
#2 lore raw

[tip:x86/urgent] x86/platform/intel-mid: Join string and fix SoC name

x86/platform/intel-mid: Join string and fix SoC name
Commit-ID:  b000de5848441bc4e99c662fe1fd1b854151a84e
Gitweb:     http://git.kernel.org/tip/b000de5848441bc4e99c662fe1fd1b854151a84e
Author:     Andy Shevchenko <[email protected]>
AuthorDate: Fri, 15 Jan 2016 22:11:08 +0200
Committer:  Ingo Molnar <[email protected]>
CommitDate: Tue, 19 Jan 2016 08:39:56 +0100

x86/platform/intel-mid: Join string and fix SoC name

Join string back to make grepping a bit easier. While here, lowering case for Penwell SoC name in one case to be aligned with the rest messages.

---
 arch/x86/platform/intel-mid/intel-mid.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)
arch/x86/platform/intel-mid/intel-mid.c +3 -5
index 1bbc21e..90bb997 100644
@@ -138,7 +138,7 @@ static void intel_mid_arch_setup(void)
 		intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip]();
 	else {
 		intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL]();
-		pr_info("ARCH: Unknown SoC, assuming PENWELL!\n");
+		pr_info("ARCH: Unknown SoC, assuming Penwell!\n");
 	}
 
 out:
@@ -214,12 +214,10 @@ static inline int __init setup_x86_intel_mid_timer(char *arg)
 	else if (strcmp("lapic_and_apbt", arg) == 0)
 		intel_mid_timer_options = INTEL_MID_TIMER_LAPIC_APBT;
 	else {
-		pr_warn("X86 INTEL_MID timer option %s not recognised"
-			   " use x86_intel_mid_timer=apbt_only or lapic_and_apbt\n",
-			   arg);
+		pr_warn("X86 INTEL_MID timer option %s not recognised use x86_intel_mid_timer=apbt_only or lapic_and_apbt\n",
+			arg);
 		return -EINVAL;
 	}
 	return 0;
 }
 __setup("x86_intel_mid_timer=", setup_x86_intel_mid_timer);
-
#3 lore raw

[tip:x86/urgent] x86/platform/intel-mid: Enable 64-bit build

In reply to Andy Shevchenko
x86/platform/intel-mid: Enable 64-bit build
Commit-ID:  3fda5bb420e79b357328b358409e4c547d8f0a18
Gitweb:     http://git.kernel.org/tip/3fda5bb420e79b357328b358409e4c547d8f0a18
Author:     Andy Shevchenko <[email protected]>
AuthorDate: Fri, 15 Jan 2016 22:11:07 +0200
Committer:  Ingo Molnar <[email protected]>
CommitDate: Tue, 19 Jan 2016 08:39:56 +0100

x86/platform/intel-mid: Enable 64-bit build

Intel Tangier SoC is known to have 64-bit dual core CPU. Enable 64-bit build for it.

The kernel has been tested on Intel Edison board:

Linux buildroot 4.4.0-next-20160115+ #25 SMP Fri Jan 15 22:03:19 EET 2016 x86_64 GNU/Linux

processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 74
model name : Genuine Intel(R) CPU 4000 @ 500MHz
stepping : 8

---
 arch/x86/Kconfig         | 3 +--
 arch/x86/kernel/head64.c | 8 ++++++++
 2 files changed, 9 insertions(+), 2 deletions(-)
arch/x86/Kconfig +1 -2
index 258965d..07459a6 100644
@@ -495,11 +495,10 @@ config X86_INTEL_CE
 
 config X86_INTEL_MID
 	bool "Intel MID platform support"
-	depends on X86_32
 	depends on X86_EXTENDED_PLATFORM
 	depends on X86_PLATFORM_DEVICES
 	depends on PCI
-	depends on PCI_GOANY
+	depends on X86_64 || (PCI_GOANY && X86_32)
 	depends on X86_IO_APIC
 	select SFI
 	select I2C
arch/x86/kernel/head64.c +8 -0
index f129a9a..2c0f340 100644
@@ -192,5 +192,13 @@ void __init x86_64_start_reservations(char *real_mode_data)
 
 	reserve_ebda_region();
 
+	switch (boot_params.hdr.hardware_subarch) {
+	case X86_SUBARCH_INTEL_MID:
+		x86_intel_mid_early_setup();
+		break;
+	default:
+		break;
+	}
+
 	start_kernel();
 }