Patch "powerpc/tm: Block signal return setting invalid MSR state" has been added to the 4.1-stable tree
Subsystems (2)
This is a note to let you know that I've just added the patch titled
powerpc/tm: Block signal return setting invalid MSR state
to the 4.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
powerpc-tm-block-signal-return-setting-invalid-msr-state.patch
and it can be found in the queue-4.1 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
d2b9d2a5ad5ef04ff978c9923d19730cb05efd55Mon Sep 17 00:00:00 2001
From: Michael Neuling <[email protected]>
Date: Thu, 19 Nov 2015 15:44:44 +1100
Subject: powerpc/tm: Block signal return setting invalid MSR state
From: Michael Neuling <[email protected]>
commit d2b9d2a5ad5ef04ff978c9923d19730cb05efd55 upstream.
Currently we allow both the MSR T and S bits to be set by userspace on a signal return. Unfortunately this is a reserved configuration and will cause a TM Bad Thing exception if attempted (via rfid).
This patch checks for this case in both the 32 and 64 bit signals code. If both T and S are set, we mark the context as invalid.
Found using a syscall fuzzer.
--- arch/powerpc/include/asm/reg.h | 1 + arch/powerpc/kernel/signal_32.c | 14 +++++++++----- arch/powerpc/kernel/signal_64.c | 4 ++++ 3 files changed, 14 insertions(+), 5 deletions(-)
arch/powerpc/include/asm/reg.h +1 -0
@@ -108,6 +108,7 @@#define MSR_TS_T __MASK(MSR_TS_T_LG)/* Transaction Transactional */ #define MSR_TS_MASK (MSR_TS_T | MSR_TS_S)/* Transaction State bits */ #define MSR_TM_ACTIVE (x) (((x) & MSR_TS_MASK) != 0)/* Transaction active? */ +#define MSR_TM_RESV (x) (((x) & MSR_TS_MASK) == MSR_TS_MASK)/* Reserved */ #define MSR_TM_TRANSACTIONAL (x) (((x) & MSR_TS_MASK) == MSR_TS_T)#define MSR_TM_SUSPENDED (x) (((x) & MSR_TS_MASK) == MSR_TS_S)
arch/powerpc/kernel/signal_32.c +9 -5
@@ -875,6 +875,15 @@ static long restore_tm_user_regs(structreturn 1 ;#endif /* CONFIG_SPE */ +/* Get the top half of the MSR from the user context */ +if (__get_user (msr_hi, &tm_sr->mc_gregs[PT_MSR ])) +return 1 ; + msr_hi <<=32 ; +/* If TM bits are set to the reserved value, it's an invalid context */ +if (MSR_TM_RESV (msr_hi)) +return 1 ; +/* Pull in the MSR TM bits from the user context */ + regs->msr = (regs->msr & ~MSR_TS_MASK ) | (msr_hi &MSR_TS_MASK );/* Now, recheckpoint. This loads up all of the checkpointed (older) * registers, including FP and V[S]Rs. After recheckpointing, the * transactional versions should be loaded.
@@ -884,11 +893,6 @@ static long restore_tm_user_regs(struct current->thread.tm_texasr |=TEXASR_FS ;/* This loads the checkpointed FP/VEC state, if used */ tm_recheckpoint (¤t->thread, msr); -/* Get the top half of the MSR */ -if (__get_user (msr_hi, &tm_sr->mc_gregs[PT_MSR ])) -return 1 ; -/* Pull in MSR TM from user context */ - regs->msr = (regs->msr & ~MSR_TS_MASK ) | ((msr_hi<<32 ) &MSR_TS_MASK );/* This loads the speculative FP/VEC state, if used */ if (msr &MSR_FP ) {
arch/powerpc/kernel/signal_64.c +4 -0
@@ -427,6 +427,10 @@ static long restore_tm_sigcontexts(struc/* get MSR separately, transfer the LE bit if doing signal return */ err |=__get_user (msr, &sc->gp_regs[PT_MSR ]); +/* Don't allow reserved mode. */ +if (MSR_TM_RESV (msr)) +return -EINVAL ; +/* pull in MSR TM from user context */ regs->msr = (regs->msr & ~MSR_TS_MASK ) | (msr &MSR_TS_MASK );
Patches currently in stable-queue which might be from [email protected] are
queue-4.1/powerpc-tm-check-for-already-reclaimed-tasks.patch queue-4.1/powerpc-tm-block-signal-return-setting-invalid-msr-state.patch