mx7: Distinguish between dual and solo versions
Subsystems (2)
Fabio Estevam
reviewerPATCH 1/1 mx7: Distinguish between dual and solo versions
From: Fabio Estevam <[email protected]>
Read the number of cores in the fuses to distinguish between the dual and solo versions.
Tested on a mx7d sabresd and on a mx7solo warp7.
--- arch/arm/cpu/armv7/mx7/soc.c | 18 ++++++++++++++++++ arch/arm/imx-common/cpu.c | 2 ++ arch/arm/include/asm/arch-imx/cpu.h | 1 + 3 files changed, 21 insertions(+)
arch/arm/cpu/armv7/mx7/soc.c +18 -0
@@ -165,6 +165,21 @@ u32 get_cpu_temp_grade(int *minc, int *maxc)return val; } +static bool is_mx7d (void ) +{ +struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR ; +struct fuse_bank *bank = &ocotp->bank[1 ]; +struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; +int val; + + val =readl (&fuse->tester4); +if (val &1 ) +return false; +else +return true; +} +u32 get_cpu_rev (void ) { struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *)
@@ -172,6 +187,9 @@ u32 get_cpu_rev(void)u32 reg =readl (&ccm_anatop->digprog);u32 type = (reg >>16 ) &0xff ; +if (!is_mx7d ()) + type =MXC_CPU_MX7S ; + reg &=0xff ;return (type <<12 ) | reg; }
arch/arm/imx-common/cpu.c +2 -0
@@ -137,6 +137,8 @@ unsigned imx_ddr_size(void)const char *get_imx_type (u32 imxtype) {switch (imxtype) { +case MXC_CPU_MX7S : +return "7SOLO" ;/* Single-core version of the mx7 */ case MXC_CPU_MX7D :return "7D" ;/* Dual-core version of the mx7 */ case MXC_CPU_MX6QP :
arch/arm/include/asm/arch-imx/cpu.h +1 -0
@@ -21,6 +21,7 @@#define MXC_CPU_MX6D 0x67#define MXC_CPU_MX6DP 0x68#define MXC_CPU_MX6QP 0x69 +#define MXC_CPU_MX7S 0x71/* dummy ID */ #define MXC_CPU_MX7D 0x72#define MXC_CPU_VF610 0xF6/* dummy ID */
Signature · 1 line
1.9.1
PATCH 1/1 mx7: Distinguish between dual and solo versions
Hi Fabio,
Quoted 68 lines · Fabio Estevam
From: Fabio Estevam <[email protected]>
Read the number of cores in the fuses to distinguish between the dual and solo versions.
Tested on a mx7d sabresd and on a mx7solo warp7.
Signed-off-by Fabio Estevam <[email protected]>---
arch/arm/cpu/armv7/mx7/soc.c | 18 ++++++++++++++++++ arch/arm/imx-common/cpu.c | 2 ++ arch/arm/include/asm/arch-imx/cpu.h | 1 + 3 files changed, 21 insertions(+)arch/arm/cpu/armv7/mx7/soc.c +18
-0@@ -165,6 +165,21 @@ u32 get_cpu_temp_grade(int *minc, int *maxc)return val; } +static bool is_mx7d (void ) +{ +struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR ; +struct fuse_bank *bank = &ocotp->bank[1 ]; +struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; +int val; + + val =readl (&fuse->tester4); +if (val &1 ) +return false; +else +return true; +} +u32 get_cpu_rev (void ) { struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *)@@ -172,6 +187,9 @@ u32 get_cpu_rev(void)u32 reg =readl (&ccm_anatop->digprog);u32 type = (reg >>16 ) &0xff ; +if (!is_mx7d ()) + type =MXC_CPU_MX7S ; + reg &=0xff ;return (type <<12 ) | reg; }arch/arm/imx-common/cpu.c +2
-0@@ -137,6 +137,8 @@ unsigned imx_ddr_size(void)const char *get_imx_type (u32 imxtype) {switch (imxtype) { +case MXC_CPU_MX7S : +return "7SOLO" ;/* Single-core version of the mx7 */ case MXC_CPU_MX7D :return "7D" ;/* Dual-core version of the mx7 */ case MXC_CPU_MX6QP :arch/arm/include/asm/arch-imx/cpu.h +0
-0
arch/arm/include/asm/arch-imx/cpu.h line 26
Quoted 6 lines
arch/arm/include/asm/arch-imx/cpu.h +1
-0@@ -21,6 +21,7 @@#define MXC_CPU_MX6D 0x67#define MXC_CPU_MX6DP 0x68#define MXC_CPU_MX6QP 0x69 +#define MXC_CPU_MX7S 0x71/* dummy ID */ #define MXC_CPU_MX7D 0x72#define MXC_CPU_VF610 0xF6/* dummy ID */
Regards,
Peng.
Quoted 8 lines
Signature · 7 lines
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Stefano Babic
AppliedPATCH 1/1 mx7: Distinguish between dual and solo versions
In reply to Fabio EstevamQuoted 9 lines · Fabio Estevam
From: Fabio Estevam <[email protected]>
Read the number of cores in the fuses to distinguish between the dual and solo versions.
Tested on a mx7d sabresd and on a mx7solo warp7.
Signed-off-by Fabio Estevam <[email protected]>---
Applied to -next, thanks !
Best regards,
Stefano Babic
Signature · 5 lines
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