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Patch "MIPS: Loongson-3: Fix SMP_ASK_C0COUNT IPI handler" has been added to the 4.4-stable tree

PATCH [email protected] 1 participant 1 message Mar 1, 2016

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Stable branch MIPS MIPS/LOONGSON64 architecture
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This is a note to let you know that I've just added the patch titled

MIPS: Loongson-3: Fix SMP_ASK_C0COUNT IPI handler

to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
mips-loongson-3-fix-smp_ask_c0count-ipi-handler.patch
and it can be found in the queue-4.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From 5754843225f78ac7cbe142a6899890a9733a5a5d Mon Sep 17 00:00:00 2001

From: Huacai Chen <[email protected]>
Date: Thu, 21 Jan 2016 21:09:49 +0800
Subject: MIPS: Loongson-3: Fix SMP_ASK_C0COUNT IPI handler

From: Huacai Chen <[email protected]>

commit 5754843225f78ac7cbe142a6899890a9733a5a5d upstream.

When Core-0 handle SMP_ASK_C0COUNT IPI, we should make other cores to see the result as soon as possible (especially when Store-Fill-Buffer is enabled). Otherwise, C0_Count syncronization makes no sense.

BTW, array is more suitable than per-cpu variable for syncronization, and there is a corner case should be avoid: C0_Count of Core-0 can be really 0.

Signed-off-by Huacai Chen <[email protected]>
Cc Aurelien Jarno <[email protected]>
Cc Steven J. Hill <[email protected]>
Cc Fuxin Zhang <[email protected]>
Cc Zhangjin Wu <[email protected]>
Cc Huacai Chen <[email protected]>
Cc [email protected]

Patchwork: https://patchwork.linux-mips.org/patch/12160/

Signed-off-by Ralf Baechle <[email protected]>
Signed-off-by Greg Kroah-Hartman <[email protected]>
---
 arch/mips/loongson64/loongson-3/smp.c |   20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)
arch/mips/loongson64/loongson-3/smp.c +13 -7
@@ -30,13 +30,13 @@
 #include "smp.h"
 
 DEFINE_PER_CPU(int, cpu_state);
-DEFINE_PER_CPU(uint32_t, core0_c0count);
 
 static void *ipi_set0_regs[16];
 static void *ipi_clear0_regs[16];
 static void *ipi_status0_regs[16];
 static void *ipi_en0_regs[16];
 static void *ipi_mailbox_buf[16];
+static uint32_t core0_c0count[NR_CPUS];
 
 /* read a 32bit value from ipi register */
 #define loongson3_ipi_read32(addr) readl(addr)

@@ -275,12 +275,14 @@ void loongson3_ipi_interrupt(struct pt_r
 	if (action & SMP_ASK_C0COUNT) {
 		BUG_ON(cpu != 0);
 		c0count = read_c0_count();
-		for (i = 1; i < num_possible_cpus(); i++)
-			per_cpu(core0_c0count, i) = c0count;
+		c0count = c0count ? c0count : 1;
+		for (i = 1; i < nr_cpu_ids; i++)
+			core0_c0count[i] = c0count;
+		__wbflush(); /* Let others see the result ASAP */
 	}
 }
 
-#define MAX_LOOPS 1111
+#define MAX_LOOPS 800
 /*
  * SMP init and finish on secondary CPUs
  */

@@ -305,16 +307,20 @@ static void loongson3_init_secondary(voi
 		cpu_logical_map(cpu) / loongson_sysconf.cores_per_package;
 
 	i = 0;
-	__this_cpu_write(core0_c0count, 0);
+	core0_c0count[cpu] = 0;
 	loongson3_send_ipi_single(0, SMP_ASK_C0COUNT);
-	while (!__this_cpu_read(core0_c0count)) {
+	while (!core0_c0count[cpu]) {
 		i++;
 		cpu_relax();
 	}
 
 	if (i > MAX_LOOPS)
 		i = MAX_LOOPS;
-	initcount = __this_cpu_read(core0_c0count) + i;
+	if (cpu_data[cpu].package)
+		initcount = core0_c0count[cpu] + i;
+	else /* Local access is faster for loops */
+		initcount = core0_c0count[cpu] + i/2;
+
 	write_c0_count(initcount);
 }

Patches currently in stable-queue which might be from [email protected] are

queue-4.4/mips-loongson-3-fix-smp_ask_c0count-ipi-handler.patch queue-4.4/mips-hpet-choose-a-safe-value-for-the-etime-check.patch queue-4.4/mips-fix-some-missing-config_cpu_mipsr6-ifdefs.patch