Patch "drm/radeon: fix DP audio support for APU with DCE4.1 display engine" has been added to the 4.4-stable tree
Subsystems (3)
This is a note to let you know that I've just added the patch titled
drm/radeon: fix DP audio support for APU with DCE4.1 display engine
to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-radeon-fix-dp-audio-support-for-apu-with-dce4.1-display-engine.patch
and it can be found in the queue-4.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
fe6fc1f132b4300c1f6defd43a5d673eb60a820dMon Sep 17 00:00:00 2001
From: Slava Grigorev <[email protected]>
Date: Tue, 26 Jan 2016 17:35:57 -0500
Subject: drm/radeon: fix DP audio support for APU with DCE4.1 display engine
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From: Slava Grigorev <[email protected]>
commit fe6fc1f132b4300c1f6defd43a5d673eb60a820d upstream.
Properly setup the DFS divider for DP audio for DCE4.1.
--- drivers/gpu/drm/radeon/evergreen_hdmi.c | 10 ++++++++ drivers/gpu/drm/radeon/evergreend.h | 5 ++++ drivers/gpu/drm/radeon/radeon_atombios.c | 37 ++++++++++++++++++++++++------- 3 files changed, 44 insertions(+), 8 deletions(-)
drivers/gpu/drm/radeon/evergreen_hdmi.c +10 -0
@@ -289,6 +289,16 @@ void dce4_dp_audio_set_dto(struct radeon* number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator */ +if (ASIC_IS_DCE41 (rdev)) { +unsigned int div = (RREG32 (DCE41_DENTIST_DISPCLK_CNTL ) & +DENTIST_DPREFCLK_WDIVIDER_MASK ) >> +DENTIST_DPREFCLK_WDIVIDER_SHIFT ; + div =radeon_audio_decode_dfs_div (div); + +if (div) + clock =100 * clock / div; + } +WREG32 (DCCG_AUDIO_DTO1_PHASE ,24000 );WREG32 (DCCG_AUDIO_DTO1_MODULE , clock); }
drivers/gpu/drm/radeon/evergreend.h +5 -0
@@ -511,6 +511,11 @@#define DCCG_AUDIO_DTO1_CNTL 0x05cc# define DCCG_AUDIO_DTO1_USE_512FBR_DTO (1 << 3) +#define DCE41_DENTIST_DISPCLK_CNTL 0x049c +# define DENTIST_DPREFCLK_WDIVIDER (x) (((x) & 0x7f) << 24) +# define DENTIST_DPREFCLK_WDIVIDER_MASK (0x7f << 24) +# define DENTIST_DPREFCLK_WDIVIDER_SHIFT 24 +/* DCE 4.0 AFMT */ #define HDMI_CONTROL 0x7030# define HDMI_KEEPOUT_MODE (1 << 0)
drivers/gpu/drm/radeon/radeon_atombios.c +29 -8
@@ -1106,6 +1106,31 @@ union firmware_info {ATOM_FIRMWARE_INFO_V2_2 info_22; }; +union igp_info { +struct _ATOM_INTEGRATED_SYSTEM_INFO info; +struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 info_2; +struct _ATOM_INTEGRATED_SYSTEM_INFO_V6 info_6; +struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_7 info_7; +struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_8 info_8; +}; + +static void radeon_atombios_get_dentist_vco_freq (struct radeon_device *rdev) +{ +struct radeon_mode_info *mode_info = &rdev->mode_info; +int index =GetIndexIntoMasterTable (DATA , IntegratedSystemInfo); +union igp_info *igp_info; +u8 frev, crev; +u16 data_offset; + +if (atom_parse_data_header (mode_info->atom_context, index,NULL , + &frev, &crev, &data_offset)) { + igp_info = (union igp_info *)(mode_info->atom_context->bios + + data_offset); + rdev->clock.vco_freq = +le32_to_cpu (igp_info->info_6.ulDentistVCOFreq); + } +} +bool radeon_atom_get_clock_info (struct drm_device *dev) {struct radeon_device *rdev = dev->dev_private;
@@ -1260,6 +1285,10 @@ bool radeon_atom_get_clock_info(struct dif (ASIC_IS_DCE8 (rdev)) rdev->clock.vco_freq =le32_to_cpu (firmware_info->info_22.ulGPUPLL_OutputFreq); +else if (ASIC_IS_DCE5 (rdev)) + rdev->clock.vco_freq = rdev->clock.current_dispclk; +else if (ASIC_IS_DCE41 (rdev)) +radeon_atombios_get_dentist_vco_freq (rdev);else rdev->clock.vco_freq = rdev->clock.current_dispclk;
@@ -1272,14 +1301,6 @@ bool radeon_atom_get_clock_info(struct dreturn false; } -union igp_info { -struct _ATOM_INTEGRATED_SYSTEM_INFO info; -struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 info_2; -struct _ATOM_INTEGRATED_SYSTEM_INFO_V6 info_6; -struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_7 info_7; -struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_8 info_8; -}; -bool radeon_atombios_sideport_present (struct radeon_device *rdev) {struct radeon_mode_info *mode_info = &rdev->mode_info;
Patches currently in stable-queue which might be from [email protected] are
queue-4.4/drm-radeon-fix-dp-audio-support-for-apu-with-dce4.1-display-engine.patch queue-4.4/drm-radeon-cleaned-up-vco-output-settings-for-dp-audio.patch queue-4.4/drm-radeon-fix-slow-audio-over-dp-on-dce8.patch queue-4.4/drm-radeon-add-a-common-function-for-dfs-handling.patch