Patch "mmc: sdhci-pxav3: fix higher speed mode capabilities" has been added to the 4.5-stable tree
Subsystems (3)
This is a note to let you know that I've just added the patch titled
mmc: sdhci-pxav3: fix higher speed mode capabilities
to the 4.5-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
mmc-sdhci-pxav3-fix-higher-speed-mode-capabilities.patch
and it can be found in the queue-4.5 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
0ca33b4ad9cfc133bb3d93eec1ad0eea83d6f252Mon Sep 17 00:00:00 2001
From: Russell King <[email protected]>
Date: Tue, 26 Jan 2016 13:40:47 +0000
Subject: mmc: sdhci-pxav3: fix higher speed mode capabilities
From: Russell King <[email protected]>
commit 0ca33b4ad9cfc133bb3d93eec1ad0eea83d6f252 upstream.
Commit 1140011ee9d9 ("mmc: sdhci-pxav3: Modify clock settings for the SDR50 and DDR50 modes") broke any chance of the SDR50 or DDR50 modes being used.
The commit claims that SDR50 and DDR50 require clock adjustments in the SDIO3 Configuration register, which is located via the "conf-sdio3" resource. However, when this resource is given, we fail to read the host capabilities 1 register, resulting in host->caps1 being zero. Hence, both SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50 bits remain zero, disabling the SDR50 and DDR50 modes.
The underlying idea in this function appears to be to read the device capabilities, modify them, and set SDHCI_QUIRK_MISSING_CAPS to cause our modified capabilities to be used. Implement exactly that.
--- drivers/mmc/host/sdhci-pxav3.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
drivers/mmc/host/sdhci-pxav3.c +4 -2
@@ -137,6 +137,10 @@ static int armada_38x_quirks(struct plat host->quirks &= ~SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN ; host->quirks |=SDHCI_QUIRK_MISSING_CAPS ; + + host->caps =sdhci_readl (host,SDHCI_CAPABILITIES ); + host->caps1 =sdhci_readl (host,SDHCI_CAPABILITIES_1 ); + res =platform_get_resource_byname (pdev,IORESOURCE_MEM ,"conf-sdio3" );if (res) {
@@ -150,7 +154,6 @@ static int armada_38x_quirks(struct plat* Configuration register, if the adjustment is not done, * remove them from the capabilities. */ - host->caps1 =sdhci_readl (host,SDHCI_CAPABILITIES_1 ); host->caps1 &= ~(SDHCI_SUPPORT_SDR50 |SDHCI_SUPPORT_DDR50 );dev_warn (&pdev->dev,"conf-sdio3 register not found: disabling SDR50 and DDR50 modes.\nConsider updating your dtb\n" );
@@ -161,7 +164,6 @@ static int armada_38x_quirks(struct plat* controller has different capabilities than the ones shown * in its registers */ - host->caps =sdhci_readl (host,SDHCI_CAPABILITIES );if (of_property_read_bool (np,"no-1-8-v" )) { host->caps &= ~SDHCI_CAN_VDD_180 ; host->mmc->caps &= ~MMC_CAP_1_8V_DDR ;
Patches currently in stable-queue which might be from [email protected] are
queue-4.5/mmc-sdhci-fix-command-response-crc-error-handling.patch queue-4.5/mmc-sdhci-avoid-unnecessary-mapping-unmapping-of-align-buffer.patch queue-4.5/mmc-sdhci-move-initialisation-of-command-error-member.patch queue-4.5/mmc-sdhci-fix-data-timeout-part-2.patch queue-4.5/mmc-sdhci-clean-up-command-error-handling.patch queue-4.5/mmc-sdhci-further-fix-for-dma-unmapping-in-sdhci_post_req.patch queue-4.5/mmc-sdhci-pxav3-fix-higher-speed-mode-capabilities.patch queue-4.5/mmc-sdhci-fix-data-timeout-part-1.patch queue-4.5/mmc-sdhci-plug-dma-mapping-leak-on-error.patch