Patch "can: c_can: Update D_CAN TX and RX functions to 32 bit - fix Altera Cyclone access" has been added to the 4.4-stable tree
Subsystems (2)
This is a note to let you know that I've just added the patch titled
can: c_can: Update D_CAN TX and RX functions to 32 bit - fix Altera Cyclone access
to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
can-c_can-update-d_can-tx-and-rx-functions-to-32-bit-fix-altera-cyclone-access.patch
and it can be found in the queue-4.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
427460c83cdf55069eee49799a0caef7dde8df69Mon Sep 17 00:00:00 2001
From: Thor Thayer <[email protected]>
Date: Thu, 16 Jun 2016 11:10:19 -0500
Subject: can: c_can: Update D_CAN TX and RX functions to 32 bit - fix Altera Cyclone access
From: Thor Thayer <[email protected]>
commit 427460c83cdf55069eee49799a0caef7dde8df69 upstream.
When testing CAN write floods on Altera's CycloneV, the first 2 bytes are sometimes 0x00, 0x00 or corrupted instead of the values sent. Also observed bytes 4 & 5 were corrupted in some cases.
The D_CAN Data registers are 32 bits and changing from 16 bit writes to 32 bit writes fixes the problem.
Testing performed on Altera CycloneV (D_CAN). Requesting tests on other C_CAN & D_CAN platforms.
--- drivers/net/can/c_can/c_can.c | 38 +++++++++++++++++++++++++++++++------- 1 file changed, 31 insertions(+), 7 deletions(-)
drivers/net/can/c_can/c_can.c +31 -7
@@ -332,9 +332,23 @@ static void c_can_setup_tx_object(struct priv->write_reg (priv,C_CAN_IFACE (MSGCTRL_REG , iface), ctrl); -for (i =0 ; i < frame->can_dlc; i +=2 ) { - priv->write_reg (priv,C_CAN_IFACE (DATA1_REG , iface) + i /2 , - frame->data[i] | (frame->data[i +1 ] <<8 )); +if (priv->type ==BOSCH_D_CAN ) { +u32 data =0 , dreg =C_CAN_IFACE (DATA1_REG , iface); + +for (i =0 ; i < frame->can_dlc; i +=4 , dreg +=2 ) { + data = (u32 )frame->data[i]; + data |= (u32 )frame->data[i +1 ] <<8 ; + data |= (u32 )frame->data[i +2 ] <<16 ; + data |= (u32 )frame->data[i +3 ] <<24 ; + priv->write_reg32 (priv, dreg, data); + } + }else { +for (i =0 ; i < frame->can_dlc; i +=2 ) { + priv->write_reg (priv, +C_CAN_IFACE (DATA1_REG , iface) + i /2 , + frame->data[i] | + (frame->data[i +1 ] <<8 )); + } } }
@@ -402,10 +416,20 @@ static int c_can_read_msg_object(struct }else {int i, dreg =C_CAN_IFACE (DATA1_REG , iface); -for (i =0 ; i < frame->can_dlc; i +=2 , dreg ++) { - data = priv->read_reg (priv, dreg); - frame->data[i] = data; - frame->data[i +1 ] = data >>8 ; +if (priv->type ==BOSCH_D_CAN ) { +for (i =0 ; i < frame->can_dlc; i +=4 , dreg +=2 ) { + data = priv->read_reg32 (priv, dreg); + frame->data[i] = data; + frame->data[i +1 ] = data >>8 ; + frame->data[i +2 ] = data >>16 ; + frame->data[i +3 ] = data >>24 ; + } + }else { +for (i =0 ; i < frame->can_dlc; i +=2 , dreg++) { + data = priv->read_reg (priv, dreg); + frame->data[i] = data; + frame->data[i +1 ] = data >>8 ; + } } }
Patches currently in stable-queue which might be from [email protected] are
queue-4.4/can-c_can-update-d_can-tx-and-rx-functions-to-32-bit-fix-altera-cyclone-access.patch