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Synopsys pcie driver question

DISCUSSION Pratyush Anand 2 participants 2 messages Aug 14, 2016 – Aug 22, 2016 1 message not in the archive PCI

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Pratyush Anand

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#1 lore raw

Hi,

Quoted 1 line · First Light

Hi, Dear maintainers for sysnopsys pcie driver

Please always keep the mailing list in CC, so that you can have response from wider audience.

Quoted 20 lines

I have one question for this driver

we are using synopsys PCIE IP in our platform,and I'm
trying to use linux driver(drivers/pci/host/pcie-designware.c) to bring up this IP.

but I met one issue which I cannot understand whether it is software issue or hardware issue,
please help to clearify. thank you very much!

In pcie-designware.c, the interface to read config is dw_pcie_rd_conf function, below is part of the code:

if (bus->number == pp->root_bus_nr)
return dw_pcie_rd_own_conf(...)
else
return dw_pcie_rd_other_conf(...)

Quoted 9 lines

this part of code checks if it is the root bus, if so, read own config registers, otherwise use DBF way to read configs from EPs.

In our platform, we put one SSD device under bus0 device1. during enumration, when above software code try to read ssd's registers,

it found the bus is 0, so it reads the RC's register, but not the SSD's register.

How do you know that when it tried to read bus 0, it was your SSD device? That should always be RC. Did you check if linkup was OK for your endpoint device? Do you see "link up" in your dmesg?

Quoted 1 line

so our ssd is never enumrated.

Which host platform for designware do you use? Is that host driver in mainline? Does other standard PCIe card work with your host?

~Pratyush

Quoted 21 lines

is there any way to do some hardware or software configuration to make it work? or do we need to change our hardware design?

Thanks
Xiaoguang

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#2 lore raw

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