FAILED: patch "[PATCH] drm/i915/vlv: Reset the ADPA in vlv_display_power_well_init()" failed to apply to 4.7-stable tree
Subsystems (3)
[email protected]
maintainerThe patch below does not apply to the 4.7-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
Quoted 1 line
From
4c732e6ee9e71903934d75b12a021eb3520b6197Mon Sep 17 00:00:00 2001
From: Lyude <[email protected]>
Date: Tue, 21 Jun 2016 17:03:42 -0400
Subject: [PATCH] drm/i915/vlv: Reset the ADPA in vlv_display_power_well_init()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
While VGA hotplugging worked(ish) before, it looks like that was mainly because we'd unintentionally enable it in valleyview_crt_detect_hotplug() when we did a force trigger. This doesn't work reliably enough because whenever the display powerwell on vlv gets disabled, the values set in VLV_ADPA get cleared and consequently VGA hotplugging gets disabled. This causes bugs such as one we found on an Intel NUC, where doing the following sequence of hotplugs:
- Disconnect all monitors
- Connect VGA
- Disconnect VGA
- Connect HDMI
Would result in VGA hotplugging becoming disabled, due to the powerwells getting toggled in the process of connecting HDMI.
Changes since v3:
- Expose intel_crt_reset() through intel_drv.h and call that in vlv_display_power_well_init() instead of encoder->base.funcs->reset(&encoder->base);
Changes since v2:
- Use intel_encoder structs instead of drm_encoder structs
Changes since v1:
- Instead of handling the register writes ourself, we just reuse intel_crt_detect()
- Instead of resetting the ADPA during display IRQ installation, we now reset them in vlv_display_power_well_init()
drivers/gpu/drm/i915/intel_crt.c +1 -1
@@ -717,7 +717,7 @@ static int intel_crt_set_property(struct drm_connector *connector,return 0 ; } -static void intel_crt_reset (struct drm_encoder *encoder) +void intel_crt_reset (struct drm_encoder *encoder) {struct drm_device *dev = encoder->dev;struct drm_i915_private *dev_priv =to_i915 (dev);
drivers/gpu/drm/i915/intel_drv.h +1 -1
@@ -1102,7 +1102,7 @@ void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv,/* intel_crt.c */ void intel_crt_init (struct drm_device *dev); - +void intel_crt_reset (struct drm_encoder *encoder);/* intel_ddi.c */ void intel_ddi_clk_select(struct intel_encoder *encoder,
drivers/gpu/drm/i915/intel_runtime_pm.c +7 -0
@@ -1078,6 +1078,7 @@ static void vlv_init_display_clock_gating(struct drm_i915_private *dev_priv)static void vlv_display_power_well_init (struct drm_i915_private *dev_priv) { +struct intel_encoder *encoder;enum pipe pipe;/*
@@ -1113,6 +1114,12 @@ static void vlv_display_power_well_init(struct drm_i915_private *dev_priv)intel_hpd_init (dev_priv); +/* Re-enable the ADPA, if we have one */ +for_each_intel_encoder (&dev_priv->drm, encoder) { +if (encoder->type ==INTEL_OUTPUT_ANALOG ) +intel_crt_reset (&encoder->base); + } +i915_redisable_vga_power_on (&dev_priv->drm); }