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FAILED: patch "[PATCH] drm/i915: Respect DP++ adaptor TMDS clock limit" failed to apply to 4.7-stable tree

PATCH [email protected] 1 participant 1 message Aug 18, 2016

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The patch below does not apply to the 4.7-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

Quoted 1 line

From b1ba124d8e95cca48d33502a4a76b1ed09d213ce Mon Sep 17 00:00:00 2001

From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <[email protected]>
Date: Mon, 2 May 2016 22:08:23 +0300
Subject: [PATCH] drm/i915: Respect DP++ adaptor TMDS clock limit
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Try to detect the max TMDS clock limit for the DP++ adaptor (if any) and take it into account when checking the port clock.

Note that as with the sink (HDMI vs. DVI) TMDS clock limit we'll ignore the adaptor TMDS clock limit in the modeset path, in case users are already "overclocking" their TMDS links. One subtle change here is that we'll have to respect the adaptor TMDS clock limit when we decide whether to do 12bpc or 8bpc, otherwise we might end up picking 12bpc and accidentally driving the TMDS link out of spec even when the user chose a mode that fits wihting the limits at 8bpc. This means you can't "overclock" your DP++ dongle at 12bpc anymore, but you can continue to do so at 8bpc.

Note that for simplicity we'll use the I2C access method for all dual mode adaptors including type 2. Otherwise we'd have to start mixing DP AUX and HDMI together. In the future we may need to do that if we come across any board designs that don't hook up the DDC pins to the DP++ connectors. Such boards would obviously only work with type 2 dual mode adaptors, and not type 1.

v2: Store adaptor type under indel_hdmi->dp_dual_mode
Deal with DRM_DP_DUAL_MODE_UNKNOWN
Pass adaptor type to drm_dp_dual_mode_max_tmds_clock(), and use it for type1 adaptors as well

Fixes 7a0baa623446 ("Revert "drm/i915: Disable 12bpc hdmi for now"")
Cc Paulo Zanoni <[email protected]>
Cc Shashank Sharma <[email protected]>
Cc Daniel Vetter <[email protected]>
drivers/gpu/drm/i915/intel_drv.h +5 -0
index 5d7d7a32382d..b552a967e2ed 100644
@@ -33,6 +33,7 @@
 #include <drm/drm_crtc.h>
 #include <drm/drm_crtc_helper.h>
 #include <drm/drm_fb_helper.h>
+#include <drm/drm_dp_dual_mode_helper.h>
 #include <drm/drm_dp_mst_helper.h>
 #include <drm/drm_rect.h>
 #include <drm/drm_atomic.h>
@@ -753,6 +754,10 @@ struct cxsr_latency {
 struct intel_hdmi {
 	i915_reg_t hdmi_reg;
 	int ddc_bus;
+	struct {
+		enum drm_dp_dual_mode_type type;
+		int max_tmds_clock;
+	} dp_dual_mode;
 	bool limited_color_range;
 	bool color_range_auto;
 	bool has_hdmi_sink;
drivers/gpu/drm/i915/intel_hdmi.c +50 -8

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