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imx: iomux-v3: Fix build error with snvs base

PATCH Superseded Jagan Teki 2 participants 6 messages Sep 13, 2016

Subsystems (3)

v1 of 7 Superseded Latest is v7 →

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Jagan Teki

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#0 lore raw

PATCH 1/5 imx: iomux-v3: Fix build error with snvs base

snvs base is added only for i.MX6ULL but the code is added for common, so firing build error while compiling other i.MX6 SOC's

Issue observed with the below patch
"imx: mx6ull: Update memory map address"
(sha1: e8eac1b5b3a98a06426bc4867c03c38329841e5c)

Build log:
CC arch/arm/imx-common/iomux-v3.o
arch/arm/imx-common/iomux-v3.c: In function 'imx_iomux_v3_setup_pad':
arch/arm/imx-common/iomux-v3.c:56:19: error: 'IOMUXC_SNVS_BASE_ADDR' undeclared (first use in this function)

    base = (void *)IOMUXC_SNVS_BASE_ADDR;
Cc Stefano Babic <[email protected]>
Cc Peng Fan <[email protected]>
Cc Michael Trimarchi <[email protected]>
---
 arch/arm/imx-common/iomux-v3.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/imx-common/iomux-v3.c +1 -1
index 78f667e..efb884c 100644
@@ -50,7 +50,7 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
 		if (sel_input_ofs)
 			sel_input_ofs += IOMUX_LPSR_SEL_INPUT_OFS;
 	}
-#else
+#elif defined(CONFIG_MX6ULL)
 	if (is_mx6ull()) {
 		if (lpsr == IOMUX_CONFIG_LPSR) {
 			base = (void *)IOMUXC_SNVS_BASE_ADDR;
Signature · 1 line
2.7.4
author
#1 lore raw

PATCH 2/5 serial: Kconfig: Add MXC_UART entry

Added kconfig for MXC_UART driver.

Cc Simon Glass <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Stefano Babic <[email protected]>
Cc Peng Fan <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
---
 drivers/serial/Kconfig | 7 +++++++
 1 file changed, 7 insertions(+)
drivers/serial/Kconfig +7 -0
index ab5df70..9abf158 100644
@@ -295,6 +295,13 @@ config FSL_LPUART
 	  Select this to enable a Low Power UART for Freescale VF610 and
 	  QorIQ Layerscape devices.
 
+config MXC_UART
+	bool "IMX serial port support"
+	depends on MX6
+	help
+	  If you have a machine based on a Motorola IMX CPU you
+	  can enable its onboard serial port by enabling this option.
+
 config PIC32_SERIAL
 	bool "Support for Microchip PIC32 on-chip UART"
 	depends on DM_SERIAL && MACH_PIC32
Signature · 1 line
2.7.4
author
#2 lore raw

PATCH 3/5 thermal: Kconfig: Add IMX_THERMAL entry

In reply to Jagan Teki

Added kconfig for IMX_THERMAL driver.

Cc Simon Glass <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Stefano Babic <[email protected]>
Cc Peng Fan <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
---
 drivers/thermal/Kconfig | 13 +++++++++++++
 1 file changed, 13 insertions(+)
drivers/thermal/Kconfig +13 -0
index 8e22ea7..f0ffbb3 100644
@@ -5,3 +5,16 @@ config DM_THERMAL
 	  temperature sensors to permit warnings, speed throttling or even
 	  automatic power-off when the temperature gets too high or low. Other
 	  devices may be discrete but connected on a suitable bus.
+
+if DM_THERMAL
+
+config IMX_THERMAL
+	bool "Temperature sensor driver for Freescale i.MX SoCs"
+	depends on MX6
+	help
+	  Support for Temperature Monitor (TEMPMON) found on Freescale i.MX SoCs.
+          It supports one critical trip point and one passive trip point.  The
+          cpufreq is used as the cooling device to throttle CPUs when the
+          passive trip is crossed.
+
+endif # if DM_THERMAL
Signature · 1 line
2.7.4
author
#3 lore raw

PATCH 4/5 Kconfig: Add DEFAULT_FDT_FILE entry

In reply to Jagan Teki

Add kconfig entry for CONFIG_DEFAULT_FDT_FILE

Cc Tom Rini <[email protected]>
Cc Simon Glass <[email protected]>
Cc Michael Trimarchi <[email protected]>
---
 common/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)
common/Kconfig +6 -0
index 46e7173..278e33b 100644
@@ -198,6 +198,12 @@ config CONSOLE_RECORD_IN_SIZE
 	  The buffer is allocated immediately after the malloc() region is
 	  ready.
 
+config DEFAULT_FDT_FILE
+	string "Default fdt file"
+	default n
+	help
+	  This option is used to set the default fdt file to boot OS.
+
 config SYS_NO_FLASH
 	bool "Disable support for parallel NOR flash"
 	default n
Signature · 1 line
2.7.4
author
#4 lore raw

PATCH 5/5 arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support

In reply to Jagan Teki

Boot Log for i.CoreM6 Quad/Dual Starter Kit:

U-Boot SPL 2016.09-rc2-30745-gd99a2be (Sep 13 2016 - 18:28:43) Trying to boot from MMC1

U-Boot 2016.09-rc2-30745-gd99a2be (Sep 13 2016 - 18:28:43 +0530)

CPU:   Freescale i.MX6Q rev1.2 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 44C
Reset cause: POR
DRAM:  1 GiB
MMC:   FSL_SDHC: 0

*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed

No ethernet found.
Hit any key to stop autoboot: 0
icorem6qdl>

Boot Log for i.CoreM6 DualLite/Solo Starter Kit:

U-Boot 2016.09-rc2-30745-gb4198e9 (Sep 13 2016 - 18:48:53 +0530)

CPU:   Freescale i.MX6SOLO rev1.3 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 40C
Reset cause: POR
DRAM:  256 MiB
MMC:   FSL_SDHC: 0

*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed

No ethernet found.
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
switch to partitions #0, OK
mmc0 is current device
reading boot.scr
253 bytes read in 10 ms (24.4 KiB/s)
Running bootscript from mmc ...
reading zImage
6741080 bytes read in 340 ms (18.9 MiB/s) reading imx6dl-icore.dtb
28519 bytes read in 19 ms (1.4 MiB/s)
Booting using the fdt blob at 0x18000000 Using Device Tree in place at 18000000, end 18009f66

Starting kernel ...

Cc Peng Fan <[email protected]>
Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
---
 arch/arm/cpu/armv7/mx6/Kconfig    |   8 +
 board/engicam/icorem6/Kconfig     |  12 ++
 board/engicam/icorem6/MAINTAINERS |   6 +
 board/engicam/icorem6/Makefile    |   6 +
 board/engicam/icorem6/README      |  28 +++
 board/engicam/icorem6/icorem6.c   | 403 ++++++++++++++++++++++++++++++++++++++
 configs/imx6qdl_icore_defconfig   |  26 +++
 include/configs/imx6qdl_icore.h   | 116 +++++++++++
 8 files changed, 605 insertions(+)
 create mode 100644 board/engicam/icorem6/Kconfig
 create mode 100644 board/engicam/icorem6/MAINTAINERS
 create mode 100644 board/engicam/icorem6/Makefile
 create mode 100644 board/engicam/icorem6/README
 create mode 100644 board/engicam/icorem6/icorem6.c
 create mode 100644 configs/imx6qdl_icore_defconfig
 create mode 100644 include/configs/imx6qdl_icore.h
arch/arm/cpu/armv7/mx6/Kconfig +8 -0
index d851b26..5d549bd 100644
@@ -95,6 +95,13 @@ config TARGET_MX6CUBOXI
 config TARGET_MX6QARM2
 	bool "mx6qarm2"
 
+config TARGET_MX6Q_ICORE
+	bool "Support Engicam i.Core"
+	select MX6QDL
+	select DM
+	select DM_THERMAL
+	select SUPPORT_SPL
+
 config TARGET_MX6QSABREAUTO
 	bool "mx6qsabreauto"
 	select DM
@@ -225,6 +232,7 @@ source "board/compulab/cm_fx6/Kconfig"
 source "board/congatec/cgtqmx6eval/Kconfig"
 source "board/el/el6x/Kconfig"
 source "board/embest/mx6boards/Kconfig"
+source "board/engicam/icorem6/Kconfig"
 source "board/freescale/mx6qarm2/Kconfig"
 source "board/freescale/mx6qsabreauto/Kconfig"
 source "board/freescale/mx6sabresd/Kconfig"
board/engicam/icorem6/Kconfig new file +12 -0
new file mode 100644
index 0000000..6d62f0e
@@ -0,0 +1,12 @@
+if TARGET_MX6Q_ICORE
+
+config SYS_BOARD
+	default "icorem6"
+
+config SYS_VENDOR
+	default "engicam"
+
+config SYS_CONFIG_NAME
+	default "imx6qdl_icore"
+
+endif
board/engicam/icorem6/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..3e06c6b
@@ -0,0 +1,6 @@
+ICOREM6QDL BOARD
+M:	Jagan Teki <[email protected]>
+S:	Maintained
+F:	board/engicam/icorem6
+F:	include/configs/icorem6qdl.h
+F:	configs/icorem6qdl_defconfig
board/engicam/icorem6/Makefile new file +6 -0
new file mode 100644
index 0000000..9ec9ecd
@@ -0,0 +1,6 @@
+# Copyright (C) 2016 Amarula Solutions B.V.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y  := icorem6.o
board/engicam/icorem6/README new file +28 -0
new file mode 100644
index 0000000..c9001bc
@@ -0,0 +1,28 @@
+How to use U-Boot on Engicam i.CoreM6 DualLite/Solo and Quad/Dual Starter Kit:
+-----------------------------------------------------------------------------
+
+- Build U-Boot for Engicam i.CoreM6 QDL:
+
+$ make mrproper
+$ make icorem6qdl_defconfig
+$ make
+
+This will generate the SPL image called SPL and the u-boot.img.
+
+- Flash the SPL image into the micro SD card:
+
+sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
+
+- Flash the u-boot.img image into the micro SD card:
+
+sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync
+
+- Jumper settings:
+
+MMC Boot: JM3 Closed
+
+- Connect the Serial cable between the Starter Kit and the PC for the console.
+(J28 is the Linux Serial console connector)
+
+- Insert the micro SD card in the board, power it up and U-Boot messages should
+come up.
board/engicam/icorem6/icorem6.c new file +403 -0

403 lines not on this page · raw message

configs/imx6qdl_icore_defconfig new file +26 -0
new file mode 100644
index 0000000..00cf241
@@ -0,0 +1,26 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6Q_ICORE=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC"
+CONFIG_DEFAULT_FDT_FILE="imx6dl-icore.dtb"
+CONFIG_SYS_PROMPT="icorem6qdl> "
+CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_HUSH_PARSER=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_SYS_MAXARGS=32
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_LIBFDT=y
+CONFIG_MXC_UART=y
+CONFIG_IMX_THERMAL=y
include/configs/imx6qdl_icore.h new file +116 -0

116 lines not on this page · raw message

Signature · 1 line
2.7.4
reviewer
#5 lore raw

PATCH 5/5 arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support

board/engicam/icorem6/icorem6.c line 33

Quoted 11 lines · Jagan Teki
board/engicam/icorem6/icorem6.c new file +11 -0
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
+       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
+       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |             \
+       PAD_CTL_PUS_22K_UP  | PAD_CTL_SPEED_LOW |               \
+       PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+iomux_v3_cfg_t const usdhc1_pads[] = {

static

Quoted 4 lines
board/engicam/icorem6/icorem6.c new file +4 -0
+       IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),

board/engicam/icorem6/icorem6.c line 47

Quoted 10 lines
board/engicam/icorem6/icorem6.c new file +10 -0
+       IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)),/* CD */
+};
+
+#ifdef CONFIG_FSL_ESDHC
+#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 1)
+#define USDHC3_CD_GPIO IMX_GPIO_NR(6, 15)
+
+struct fsl_esdhc_cfg usdhc_cfg[2] = {

static

board/engicam/icorem6/icorem6.c line 77

Quoted 9 lines
board/engicam/icorem6/icorem6.c new file +9 -0
+int board_mmc_init(bd_t *bis)
+{
+       int i;
+
+       /*
+       * According to the board_mmc_init() the following map is done:
+       * (U-boot device node)    (Physical Port)
+       * mmc0                          USDHC1
+       * mmc1                          USDHC3

Here you say both mmc are used.

board/engicam/icorem6/icorem6.c line 85

Quoted 8 lines
board/engicam/icorem6/icorem6.c new file +8 -0
+       */
+       for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
+               switch (i) {
+               case 0:
+                       SETUP_IOMUX_PADS(usdhc1_pads);
+                       gpio_direction_input(USDHC1_CD_GPIO);
+                       usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+                       break;

,but here only USDHC1 is initialized.

If only USDHC1 is initialized you can skip the for loop.

board/engicam/icorem6/icorem6.c line 93

Quoted 8 lines
board/engicam/icorem6/icorem6.c new file +8 -0
+               default:
+                       printf("Warning: you configured more USDHC controllers"
+                               "(%d) than supported by the board\n", i + 1);
+                       return 0;
+                       }
+
+               if (fsl_esdhc_initialize(bis, &usdhc_cfg[i]))
+                       printf("Warning: failed to initialize mmc dev %d\n", i);

If fsl_esdhc_initialize() fails you are returning 0, whic is wrong.

You want this probably:

ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
if (ret)

    return ret;

Or if only USDHC1 is used you can do:

ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
if (ret)

    return ret;

board/engicam/icorem6/icorem6.c line 100

Quoted 7 lines
board/engicam/icorem6/icorem6.c new file +7 -0
+       }
+
+       return 0;
+}
+#endif
+
+iomux_v3_cfg_t const uart4_pads[] = {

static

board/engicam/icorem6/icorem6.c line 122

Quoted 3 lines
board/engicam/icorem6/icorem6.c new file +3 -0
+int dram_init(void)
+{
+       gd->ram_size = get_ram_size((long *)PHYS_SDRAM, MAX_SDRAM_SIZE);

You should use imx_ddr_size() here.