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EDAC, altera: Disable IRQ while injecting SDRAM errors

PATCH Applied [email protected] 2 participants 2 messages Oct 19, 2016 – Oct 22, 2016

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EDAC-core Arm/socfpga EDAC support
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PATCH 1/1 EDAC, altera: Disable IRQ while injecting SDRAM errors

From: Thor Thayer <[email protected]>

Disable IRQs while injecting SDRAM errors. The RT patches exposed a spinlock deadlock where the spinlock taken for the regmap write deadlocked with the IRQ clear regmap write.
Error injection is not normally enabled for ECC but only for testing.

Signed-off-by Thor Thayer <[email protected]>
---
 drivers/edac/altera_edac.c |    4 ++++
 1 file changed, 4 insertions(+)
drivers/edac/altera_edac.c +4 -0
index 58d3e2b..6421cc3 100644
@@ -153,13 +153,17 @@ static ssize_t altr_sdr_mc_err_inject_write(struct file *file,
 	if (count == 3) {
 		edac_printk(KERN_ALERT, EDAC_MC,
 			    "Inject Double bit error\n");
+		local_irq_disable();
 		regmap_write(drvdata->mc_vbase, priv->ce_ue_trgr_offset,
 			     (read_reg | priv->ue_set_mask));
+		local_irq_enable();
 	} else {
 		edac_printk(KERN_ALERT, EDAC_MC,
 			    "Inject Single bit error\n");
+		local_irq_disable();
 		regmap_write(drvdata->mc_vbase,	priv->ce_ue_trgr_offset,
 			     (read_reg | priv->ce_set_mask));
+		local_irq_enable();
 	}
 
 	ptemp[0] = 0x5A5A5A5A;
Signature · 1 line
1.7.9.5
maintainer Applied
#1 lore raw
Quoted 8 lines · On Wed, Oct 19, 2016 at 02:53:47PM -0500, [email protected] wrote:

From: Thor Thayer <[email protected]>

Disable IRQs while injecting SDRAM errors. The RT patches exposed a spinlock deadlock where the spinlock taken for the regmap write deadlocked with the IRQ clear regmap write.
Error injection is not normally enabled for ECC but only for testing.

Quoted 4 lines
Signed-off-by Thor Thayer <[email protected]>
---
 drivers/edac/altera_edac.c |    4 ++++
 1 file changed, 4 insertions(+)

Applied, thanks.

Signature · 4 lines
Regards/Gruss,
    Boris.

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