perf: honouring the cpuid for number of fixed counters in hypervisors
Subsystems (2)
RFC PATCH v2 1/1 perf: honouring the cpuid for number of fixed counters in hypervisors
From: Imre Palik <[email protected]>
perf doesn't seem to honour the number of fixed counters specified by cpuid leaf 0xa. It always assume that Intel CPUs have at least 3 fixed counters.
So if some of the fixed counters are masked out by the hypervisor, it still tries to check/set them.
This patch makes perf behave nicer when the kernel is running under a hypervisor that doesn't expose all the counters.
This patch contains some ideas from Matt Wilson.
--- arch/x86/events/intel/core.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)
arch/x86/events/intel/core.c +7 -3
@@ -3607,10 +3607,14 @@ __init int intel_pmu_init(void)/* * Quirk: v2 perfmon does not report fixed-purpose events, so -* assume at least 3 events: +* assume at least 3 events, when not running in a hypervisor: */ -if (version >1 ) - x86_pmu.num_counters_fixed =max ((int )edx.split.num_counters_fixed,3 ); +if (version >1 ) { +if (static_cpu_has (X86_FEATURE_HYPERVISOR )) + x86_pmu.num_counters_fixed = edx.split.num_counters_fixed; +else + x86_pmu.num_counters_fixed =max ((int )edx.split.num_counters_fixed,3 ); + }if (boot_cpu_has (X86_FEATURE_PDCM )) {u64 capabilities;
Signature · 1 line
2.10.1
Quoted 5 lines · Imre Palik
From: Imre Palik <[email protected]>
perf doesn't seem to honour the number of fixed counters specified by cpuid leaf
0xa. It always assume that Intel CPUs have at least 3 fixed counters.
Quoted 7 lines
So if some of the fixed counters are masked out by the hypervisor, it still tries to check/set them.
This patch makes perf behave nicer when the kernel is running under a hypervisor that doesn't expose all the counters.
This patch contains some ideas from Matt Wilson.
Patch looks good to me.
-Andi
Peter Zijlstra
maintainerarch/x86/events/intel/core.c __init int intel_pmu_init(void) · line 3617
Quoted 13 lines · Imre Palik
+++
b/arch/x86/events/intel/core.carch/x86/events/intel/core.c +7
-0@@ -3607,10 +3607,14 @@ __init int intel_pmu_init(void)/* * Quirk: v2 perfmon does not report fixed-purpose events, so +* assume at least 3 events, when not running in a hypervisor: */ +if (version >1 ) { +if (static_cpu_has (X86_FEATURE_HYPERVISOR )) + x86_pmu.num_counters_fixed = edx.split.num_counters_fixed; +else + x86_pmu.num_counters_fixed =max ((int )edx.split.num_counters_fixed,3 ); + }
I made that:
/*
* Quirk: v2 perfmon does not report fixed-purpose events, so
+ * assume at least 3 events, when not running in a hypervisor:
*/
+ if (version > 1) {
+ int assume = 3 * !boot_cpu_has(X86_FEATURE_HYPERVISOR);
+
+ x86_pmu.num_counters_fixed =
+ max((int)edx.split.num_counters_fixed, assume);
+ }
Thanks!
tip-bot for Imre Palik
merge bot[tip:perf/urgent] perf/x86/intel: Honour the CPUID for number of fixed counters in hypervisors
In reply to Imre Palikperf/x86/intel: Honour the CPUID for number of fixed counters in hypervisors
Commit-ID: f92b7604149a55cb601fc0b52911b1e11f0f2514 Gitweb: http://git.kernel.org/tip/f92b7604149a55cb601fc0b52911b1e11f0f2514 Author: Imre Palik <[email protected]> AuthorDate: Fri, 21 Oct 2016 01:18:59 -0700 Committer: Ingo Molnar <[email protected]> CommitDate: Fri, 28 Oct 2016 11:06:25 +0200
perf/x86/intel: Honour the CPUID for number of fixed counters in hypervisors
perf doesn't seem to honour the number of fixed counters specified by CPUID leaf 0xa. It always assumes that Intel CPUs have at least 3 fixed counters.
So if some of the fixed counters are masked out by the hypervisor, it still tries to check/set them.
This patch makes perf behave nicer when the kernel is running under a hypervisor that doesn't expose all the counters.
This patch contains some ideas from Matt Wilson.
--- arch/x86/events/intel/core.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)
arch/x86/events/intel/core.c +7 -3
@@ -3607,10 +3607,14 @@ __init int intel_pmu_init(void)/* * Quirk: v2 perfmon does not report fixed-purpose events, so -* assume at least 3 events: +* assume at least 3 events, when not running in a hypervisor: */ -if (version >1 ) - x86_pmu.num_counters_fixed =max ((int )edx.split.num_counters_fixed,3 ); +if (version >1 ) { +int assume =3 * !boot_cpu_has (X86_FEATURE_HYPERVISOR ); + + x86_pmu.num_counters_fixed = +max ((int )edx.split.num_counters_fixed, assume); + }if (boot_cpu_has (X86_FEATURE_PDCM )) {u64 capabilities;