Patch "arm64: Cortex-A53 errata workaround: check for kernel addresses" has been added to the 4.8-stable tree
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This is a note to let you know that I've just added the patch titled
arm64: Cortex-A53 errata workaround: check for kernel addresses
to the 4.8-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-cortex-a53-errata-workaround-check-for-kernel-addresses.patch
and it can be found in the queue-4.8 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
87261d19046aeaeed8eb3d2793fde850ae1b5c9eMon Sep 17 00:00:00 2001
From: Andre Przywara <[email protected]>
Date: Wed, 19 Oct 2016 14:40:54 +0100
Subject: arm64: Cortex-A53 errata workaround: check for kernel addresses
From: Andre Przywara <[email protected]>
commit 87261d19046aeaeed8eb3d2793fde850ae1b5c9e upstream.
Commit 7dd01aef0557 ("arm64: trap userspace "dc cvau" cache operation on errata-affected core") adds code to execute cache maintenance instructions in the kernel on behalf of userland on CPUs with certain ARM CPU errata. It turns out that the address hasn't been checked to be a valid user space address, allowing userland to clean cache lines in kernel space. Fix this by introducing an address check before executing the instructions on behalf of userland.
Since the address doesn't come via a syscall parameter, we can't just reject tagged pointers and instead have to remove the tag when checking against the user address limit.
--- arch/arm64/include/asm/uaccess.h | 8 ++++++++ arch/arm64/kernel/traps.c | 27 +++++++++++++++------------ 2 files changed, 23 insertions(+), 12 deletions(-)
arch/arm64/include/asm/uaccess.h +8 -0
@@ -21,6 +21,7 @@/* * User space memory access functions */ +#include <linux/bitops.h> #include <linux/kasan-checks.h> #include <linux/string.h> #include <linux/thread_info.h>
@@ -102,6 +103,13 @@ static inline void set_fs(mm_segment_t f flag; \ }) +/* +* When dealing with data aborts or instruction traps we may end up with +* a tagged userland pointer. Clear the tag to get a sane pointer to pass +* on to access_ok(), for instance. +*/ +#define untagged_addr (addr) sign_extend64(addr, 55) +#define access_ok (type, addr, size) __range_ok(addr, size)#define user_addr_max get_fs
arch/arm64/kernel/traps.c +15 -12
@@ -434,18 +434,21 @@ void cpu_enable_cache_maint_trap(void *_ }#define __user_cache_maint (insn, address, res) \ - asm volatile ( \ - "1: " insn ", %1\n" \ - " mov %w0, #0\n" \ - "2:\n" \ - " .pushsection .fixup,\"ax\"\n" \ - " .align 2\n" \ - "3: mov %w0, %w2\n" \ - " b 2b\n" \ - " .popsection\n" \ - _ASM_EXTABLE(1b, 3b) \ - : "=r" (res) \ - : "r" (address), "i" (-EFAULT) ) + if (untagged_addr(address) >= user_addr_max()) \ + res = -EFAULT; \ + else \ + asm volatile ( \ + "1: " insn ", %1\n" \ + " mov %w0, #0\n" \ + "2:\n" \ + " .pushsection .fixup,\"ax\"\n" \ + " .align 2\n" \ + "3: mov %w0, %w2\n" \ + " b 2b\n" \ + " .popsection\n" \ + _ASM_EXTABLE(1b, 3b) \ + : "=r" (res) \ + : "r" (address), "i" (-EFAULT) ) asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs) {
Patches currently in stable-queue which might be from [email protected] are
queue-4.8/arm64-cortex-a53-errata-workaround-check-for-kernel-addresses.patch