Patch "arm64: kernel: Init MDCR_EL2 even in the absence of a PMU" has been added to the 4.8-stable tree
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This is a note to let you know that I've just added the patch titled
arm64: kernel: Init MDCR_EL2 even in the absence of a PMU
to the 4.8-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-kernel-init-mdcr_el2-even-in-the-absence-of-a-pmu.patch
and it can be found in the queue-4.8 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
850540351bb1a4fa5f192e5ce55b89928cc57f42Mon Sep 17 00:00:00 2001
From: Marc Zyngier <[email protected]>
Date: Mon, 17 Oct 2016 13:47:34 +0100
Subject: arm64: kernel: Init MDCR_EL2 even in the absence of a PMU
From: Marc Zyngier <[email protected]>
commit 850540351bb1a4fa5f192e5ce55b89928cc57f42 upstream.
Commit f436b2ac90a0 ("arm64: kernel: fix architected PMU registers unconditional access") made sure we wouldn't access unimplemented PMU registers, but also left MDCR_EL2 uninitialized in that case, leading to trap bits being potentially left set.
Make sure we always write something in that register.
--- arch/arm64/kernel/head.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm64/kernel/head.S +2 -1
@@ -578,8 +578,9 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // C b.lt 4f // Skip if no PMU present mrs x0, pmcr_el0 // Disable debug access traps ubfx x0, x0, #11, #5 // to EL2 and allow access to - msr mdcr_el2, x0 // all PMU counters from EL1 4: + csel x0, xzr, x0, lt // all PMU counters from EL1 + msr mdcr_el2, x0 // (if they exist) /* Stage-2 translation */ msr vttbr_el2, xzr
Patches currently in stable-queue which might be from [email protected] are
queue-4.8/arm64-kvm-vhe-reset-pstate.pan-on-entry-to-el2.patch queue-4.8/arm64-kernel-init-mdcr_el2-even-in-the-absence-of-a-pmu.patch queue-4.8/arm64-kvm-take-s1-walks-into-account-when-determining-s2-write-faults.patch queue-4.8/irqchip-gicv3-handle-loop-timeout-proper.patch queue-4.8/irqchip-gic-v3-its-fix-entry-size-mask-for-gits_baser.patch queue-4.8/irqchip-eznps-acknowledge-nps_ipi-before-calling-the-handler.patch