Patch "drm/i915/gen9: fix the watermark res_blocks value" has been added to the 4.8-stable tree

This is a note to let you know that I've just added the patch titled

drm/i915/gen9: fix the watermark res_blocks value

to the 4.8-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
drm-i915-gen9-fix-the-watermark-res_blocks-value.patch
and it can be found in the queue-4.8 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Paulo Zanoni <[email protected]>
Date: Thu, 22 Sep 2016 18:00:33 -0300
Subject: drm/i915/gen9: fix the watermark res_blocks value

From: Paulo Zanoni <[email protected]>

commit 73fed0ef8567f1e1cba079994353e60208ded964 upstream.

We forgot the "res_blocks += y_tile_minimum" that's described on step V of our documentation.

Again, this should only affect the Y tiling cases.

It looks like the relevant code was introduced in 0fda65680e92, but there's always the possibility that it matched our specification when it was introduced, and then the specification changed while the code stayed the same. So we can't really say this was a regression, but let's try to add a "Fixes" tag anyway to help backporting.

v2: Try to add a "Fixes" tag (Maarten).

---
 drivers/gpu/drm/i915/intel_pm.c |   12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

@@ -3533,7 +3533,7 @@ static int skl_compute_plane_wm(const st
 	uint8_t cpp;
 	uint32_t width = 0, height = 0;
 	uint32_t plane_pixel_rate;
-	uint32_t y_min_scanlines;
+	uint32_t y_tile_minimum, y_min_scanlines;
 
 	if (latency == 0 || !cstate->base.active || !intel_pstate->visible) {
 		*enabled = false;

@@ -3590,10 +3590,10 @@ static int skl_compute_plane_wm(const st
 				 latency,
 				 plane_blocks_per_line);
 
+	y_tile_minimum = plane_blocks_per_line * y_min_scanlines;
+
 	if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED ||
 	    fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) {
-		uint32_t y_tile_minimum = plane_blocks_per_line *
-					  y_min_scanlines;
 		selected_result = max(method2, y_tile_minimum);
 	} else {
 		if ((ddb_allocation / plane_blocks_per_line) >= 1)

@@ -3607,10 +3607,12 @@ static int skl_compute_plane_wm(const st
 
 	if (level >= 1 && level <= 7) {
 		if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED ||
-		    fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED)
+		    fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) {
+			res_blocks += y_tile_minimum;
 			res_lines += y_min_scanlines;
-		else
+		} else {
 			res_blocks++;
+		}
 	}
 
 	if (res_blocks >= ddb_allocation || res_lines > 31) {

Patches currently in stable-queue which might be from [email protected] are

queue-4.8/drm-i915-gen9-fix-the-watermark-res_blocks-value.patch queue-4.8/drm-i915-gen9-only-add-the-planes-actually-affected-by-ddb-changes.patch queue-4.8/drm-i915-gen9-fix-the-wawmmemoryreadlatency-implementation.patch queue-4.8/drm-i915-introduce-intel_has_sagv.patch queue-4.8/drm-i915-gen9-fix-plane_blocks_per_line-on-watermarks-calculations.patch queue-4.8/drm-i915-kbl-kbl-also-needs-to-run-the-sagv-code.patch queue-4.8/drm-i915-gen9-minimum-scanlines-for-y-tile-is-not-always-4.patch queue-4.8/drm-i915-sagv-is-not-skl-only-so-rename-a-few-things.patch