Patch "x86/cpu/AMD: Fix cpu_llc_id for AMD Fam17h systems" has been added to the 4.8-stable tree
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This is a note to let you know that I've just added the patch titled
x86/cpu/AMD: Fix cpu_llc_id for AMD Fam17h systems
to the 4.8-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
x86-cpu-amd-fix-cpu_llc_id-for-amd-fam17h-systems.patch
and it can be found in the queue-4.8 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
b0b6e86846093c5f8820386bc01515f857dd8faaMon Sep 17 00:00:00 2001
From: Yazen Ghannam <[email protected]>
Date: Tue, 8 Nov 2016 09:35:06 +0100
Subject: x86/cpu/AMD: Fix cpu_llc_id for AMD Fam17h systems
From: Yazen Ghannam <[email protected]>
commit b0b6e86846093c5f8820386bc01515f857dd8faa upstream.
cpu_llc_id (Last Level Cache ID) derivation on AMD Fam17h has an underflow bug when extracting the socket_id value. It starts from 0 so subtracting 1 from it will result in an invalid value. This breaks scheduling topology later on since the cpu_llc_id will be incorrect.
For example, the the cpu_llc_id of the *other* CPU in the loops in set_cpu_sibling_map() underflows and we're generating the funniest thread_siblings masks and then when I run 8 threads of nbench, they get spread around the LLC domains in a very strange pattern which doesn't give you the normal scheduling spread one would expect for performance.
Other things like EDAC use cpu_llc_id so they will be b0rked too.
So, the APIC ID is preset in APICx020 for bits 3 and above: they contain the core complex, node and socket IDs.
The LLC is at the core complex level so we can find a unique cpu_llc_id by right shifting the APICID by 3 because then the least significant bit will be the Core Complex ID.
--- arch/x86/kernel/cpu/amd.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-)
arch/x86/kernel/cpu/amd.c +1 -5
@@ -347,7 +347,6 @@ static void amd_detect_cmp(struct cpuinf#ifdef CONFIG_SMP unsigned bits;int cpu =smp_processor_id (); -unsigned int socket_id, core_complex_id; bits = c->x86_coreid_bits;/* Low order bits define the core id (index of core in socket) */
@@ -365,10 +364,7 @@ static void amd_detect_cmp(struct cpuinfif (c->x86 !=0x17 || !cpuid_edx (0x80000006 ))return ; - socket_id = (c->apicid >> bits) -1 ; - core_complex_id = (c->apicid & ((1 << bits) -1 )) >>3 ; - -per_cpu (cpu_llc_id, cpu) = (socket_id <<3 ) | core_complex_id; +per_cpu (cpu_llc_id, cpu) = c->apicid >>3 ;#endif }
Patches currently in stable-queue which might be from [email protected] are
queue-4.8/x86-cpu-amd-fix-cpu_llc_id-for-amd-fam17h-systems.patch