Patch "powerpc/mm: Fixup kernel read only mapping" has been added to the 4.8-stable tree
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This is a note to let you know that I've just added the patch titled
powerpc/mm: Fixup kernel read only mapping
to the 4.8-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
powerpc-mm-fixup-kernel-read-only-mapping.patch
and it can be found in the queue-4.8 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
984d7a1ec67ce3a46324fa4bcb4c745bbc266cf2Mon Sep 17 00:00:00 2001
From: "Aneesh Kumar K.V" <[email protected]>
Date: Thu, 24 Nov 2016 15:09:54 +0530
Subject: powerpc/mm: Fixup kernel read only mapping
From: Aneesh Kumar K.V <[email protected]>
commit 984d7a1ec67ce3a46324fa4bcb4c745bbc266cf2 upstream.
With commit e58e87adc8bf9 ("powerpc/mm: Update _PAGE_KERNEL_RO") we started using the ppp value 0b110 to map kernel readonly. But that facility was only added as part of ISA 2.04. For earlier ISA version only supported ppp bit value for readonly mapping is 0b011. (This implies both user and kernel get mapped using the same ppp bit value for readonly mapping.).
Update the code such that for earlier architecture version we use ppp value 0b011 for readonly mapping. We don't differentiate between power5+ and power5 here and apply the new ppp bits only from power6 (ISA 2.05). This keep the changes minimal.
This fixes issue with PS3 spu usage reported at
https://lkml.kernel.org/r/[email protected]
--- arch/powerpc/include/asm/mmu.h | 14 ++++++++++---- arch/powerpc/mm/hash_utils_64.c | 8 ++++++-- 2 files changed, 16 insertions(+), 6 deletions(-)
arch/powerpc/include/asm/mmu.h +10 -4
@@ -29,6 +29,12 @@*/ /* +* Kernel read only support. +* We added the ppp value 0b110 in ISA 2.04. +*/ +#define MMU_FTR_KERNEL_RO ASM_CONST(0x00004000) + +/* * We need to clear top 16bits of va (from the remaining 64 bits )in * tlbie* instructions */
@@ -103,10 +109,10 @@#define MMU_FTRS_POWER4 MMU_FTRS_DEFAULT_HPTE_ARCH_V2#define MMU_FTRS_PPC970 MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA#define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE -#define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE -#define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE -#define MMU_FTRS_POWER8 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE -#define MMU_FTRS_POWER9 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE +#define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO +#define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO +#define MMU_FTRS_POWER8 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO +#define MMU_FTRS_POWER9 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO#define MMU_FTRS_CELL MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ MMU_FTR_CI_LARGE_PAGE#define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
arch/powerpc/mm/hash_utils_64.c +6 -2
@@ -190,8 +190,12 @@ unsigned long htab_convert_pte_flags(uns/* * Kernel read only mapped with ppp bits 0b110 */ -if (!(pteflags & _PAGE_WRITE)) - rflags |= (HPTE_R_PP0 |0x2 ); +if (!(pteflags & _PAGE_WRITE)) { +if (mmu_has_feature (MMU_FTR_KERNEL_RO )) + rflags |= (HPTE_R_PP0 |0x2 ); +else + rflags |=0x3 ; + } }else {if (pteflags & _PAGE_RWX) rflags |=0x2 ;
Patches currently in stable-queue which might be from [email protected] are
queue-4.8/powerpc-mm-fixup-kernel-read-only-mapping.patch