FAILED: patch "[PATCH] drm/i915/gen9: Fix PCODE polling during CDCLK change" failed to apply to 4.4-stable tree
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[email protected]
maintainerThe patch below does not apply to the 4.4-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
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2c7d0602c815277f7cb7c932b091288710d8aba7Mon Sep 17 00:00:00 2001
From: Imre Deak <[email protected]>
Date: Mon, 5 Dec 2016 18:27:37 +0200
Subject: [PATCH] drm/i915/gen9: Fix PCODE polling during CDCLK change
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commit 848496e5902833600f7992f4faa82dc1546051ba
Author: Ville Syrjälä <[email protected]> Date: Wed Jul 13 16:32:03 2016 +0300
drm/i915: Wait up to 3ms for the pcu to ack the cdclk change request on SKL
increased the timeout to match the spec, but we still see a timeout on at least one SKL. A CDCLK change request following the failed one will succeed nevertheless.
I could reproduce this problem easily by running kms_pipe_crc_basic in a loop. In all failure cases _wait_for() was pre-empted for >3ms and so in the worst case - when the pre-emption happened right after calculating timeout__ in _wait_for() - we called skl_cdclk_wait_for_pcu_ready() only once which failed and so _wait_for() timed out. As opposed to this the spec says to keep retrying the request for at most a 3ms period.
To fix this send the first request explicitly to guarantee that there is 3ms between the first and last request. Though this matches the spec, I noticed that in rare cases this can still time out if we sent only a few requests (in the worst case 2) _and_ PCODE is busy for some reason even after a previous request and a 3ms delay. To work around this retry the polling with pre-emption disabled to maximize the number of requests. Also increase the timeout to 10ms to account for interrupts that could reduce the number of requests. With this change I couldn't trigger the problem.
v2:
- Use 1ms poll period instead of 10us. (Chris)
v3:
- Poll with pre-emption disabled to increase the number of request attempts. (Ville, Chris)
- Factor out a helper to poll, it's also needed by the next patch. v4:
- Pass reply_mask, reply to skl_pcode_request(), instead of assuming the reply is generic. (Ville)
v5:
- List the request specific timeout values as code comment. (Ville) v6:
- Try the poll first with preemption enabled.
- Add code comment about first request being queued by PCODE. (Art)
- Add timeout_base_ms argument. (Ville)
v7:
- Clarify code comment about first queued request. (Chris)
Reference: https://bugs.freedesktop.org/show_bug.cgi?id=97929
Testcase: igt/kms_pipe_crc_basic/suspend-read-crc-pipe-B
drivers/gpu/drm/i915/i915_drv.h +2 -0
@@ -3509,6 +3509,8 @@ extern void intel_display_print_error_state(struct drm_i915_error_state_buf *e,int sandybridge_pcode_read (struct drm_i915_private *dev_priv,u32 mbox,u32 *val);int sandybridge_pcode_write (struct drm_i915_private *dev_priv,u32 mbox,u32 val); +int skl_pcode_request (struct drm_i915_private *dev_priv,u32 mbox,u32 request, +u32 reply_mask,u32 reply,int timeout_base_ms);/* intel_sideband.c */ u32 vlv_punit_read (struct drm_i915_private *dev_priv,u32 addr);
drivers/gpu/drm/i915/intel_display.c +10 -21
@@ -6244,35 +6244,24 @@ skl_dpll0_disable(struct drm_i915_private *dev_priv) dev_priv->cdclk_pll.vco =0 ; } -static bool skl_cdclk_pcu_ready (struct drm_i915_private *dev_priv) -{ -int ret; -u32 val; - -/* inform PCU we want to change CDCLK */ - val =SKL_CDCLK_PREPARE_FOR_CHANGE ; -mutex_lock (&dev_priv->rps.hw_lock); - ret =sandybridge_pcode_read (dev_priv,SKL_PCODE_CDCLK_CONTROL , &val); -mutex_unlock (&dev_priv->rps.hw_lock); - -return ret ==0 && (val &SKL_CDCLK_READY_FOR_CHANGE ); -} - -static bool skl_cdclk_wait_for_pcu_ready (struct drm_i915_private *dev_priv) -{ -return _wait_for (skl_cdclk_pcu_ready (dev_priv),3000 ,10 ) ==0 ; -} -static void skl_set_cdclk (struct drm_i915_private *dev_priv,int cdclk,int vco) {u32 freq_select, pcu_ack; +int ret;WARN_ON ((cdclk ==24000 ) != (vco ==0 ));DRM_DEBUG_DRIVER ("Changing CDCLK to %d kHz (VCO %d kHz)\n" , cdclk, vco); -if (!skl_cdclk_wait_for_pcu_ready (dev_priv)) { -DRM_ERROR ("failed to inform PCU about cdclk change\n" ); +mutex_lock (&dev_priv->rps.hw_lock); + ret =skl_pcode_request (dev_priv,SKL_PCODE_CDCLK_CONTROL , +SKL_CDCLK_PREPARE_FOR_CHANGE , +SKL_CDCLK_READY_FOR_CHANGE , +SKL_CDCLK_READY_FOR_CHANGE ,3 ); +mutex_unlock (&dev_priv->rps.hw_lock); +if (ret) { +DRM_ERROR ("Failed to inform PCU about cdclk change (%d)\n" , + ret);return ; }
drivers/gpu/drm/i915/intel_pm.c +75 -0
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