Patch "parisc: Mark cr16 clocksource unstable on SMP systems" has been added to the 4.9-stable tree

This is a note to let you know that I've just added the patch titled

parisc: Mark cr16 clocksource unstable on SMP systems

to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
parisc-mark-cr16-clocksource-unstable-on-smp-systems.patch
and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Helge Deller <[email protected]>
Date: Mon, 26 Dec 2016 12:46:01 +0100
Subject: parisc: Mark cr16 clocksource unstable on SMP systems

From: Helge Deller <[email protected]>

commit 41744213602a206f24adcb4a2b7551db3c700e72 upstream.

The cr16 interval timer of each CPU is not syncronized to other cr16 timers in other CPUs in a SMP system. So, delay the registration of the cr16 clocksource until all CPUs have been detected and then - if we are on a SMP machine - mark the cr16 clocksource as unstable and lower it's rating before registering it at the clocksource framework.

This patch fixes the stalled CPU warnings which we have seen since introduction of the cr16 clocksource.

---
 arch/parisc/kernel/time.c |   23 ++++++++++++++++++++---
 1 file changed, 20 insertions(+), 3 deletions(-)

@@ -289,9 +289,26 @@ void __init time_init(void)
 
 	cr16_hz = 100 * PAGE0->mem_10msec;  /* Hz */
 
-	/* register at clocksource framework */
-	clocksource_register_hz(&clocksource_cr16, cr16_hz);
-
 	/* register as sched_clock source */
 	sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_hz);
 }
+
+static int __init init_cr16_clocksource(void)
+{
+	/*
+	 * The cr16 interval timers are not syncronized across CPUs, so mark
+	 * them unstable and lower rating on SMP systems.
+	 */
+	if (num_online_cpus() > 1) {
+		clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
+		clocksource_cr16.rating = 0;
+	}
+
+	/* register at clocksource framework */
+	clocksource_register_hz(&clocksource_cr16,
+		100 * PAGE0->mem_10msec);
+
+	return 0;
+}
+
+device_initcall(init_cr16_clocksource);

Patches currently in stable-queue which might be from [email protected] are

queue-4.9/parisc-mark-cr16-clocksource-unstable-on-smp-systems.patch queue-4.9/parisc-add-line-break-when-printing-segfault-info.patch