Patch "clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks" has been added to the 4.9-stable tree

This is a note to let you know that I've just added the patch titled

clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks

to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
clk-sunxi-ng-sun8i-h3-set-clk_set_rate_parent-for-audio-module-clocks.patch
and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Chen-Yu Tsai <[email protected]>
Date: Fri, 11 Nov 2016 18:05:58 +0800
Subject: clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks

From: Chen-Yu Tsai <[email protected]>

commit 0f6f9302b819ca352cfd4f42c18ec08d521f9cae upstream.

The audio module clocks are supposed to be set according to the sample rate of the audio stream. The audio PLL provides the clock signal for these module clocks, and only it is freely tunable.

Set CLK_SET_RATE_PARENT for the audio module clocks so their users can properly tune the clock rate.

---
 drivers/clk/sunxi-ng/ccu-sun8i-h3.c |   10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

@@ -394,16 +394,16 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(spi1_c
 static const char * const i2s_parents[] = { "pll-audio-8x", "pll-audio-4x",
 					    "pll-audio-2x", "pll-audio" };
 static SUNXI_CCU_MUX_WITH_GATE(i2s0_clk, "i2s0", i2s_parents,
-			       0x0b0, 16, 2, BIT(31), 0);
+			       0x0b0, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
 
 static SUNXI_CCU_MUX_WITH_GATE(i2s1_clk, "i2s1", i2s_parents,
-			       0x0b4, 16, 2, BIT(31), 0);
+			       0x0b4, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
 
 static SUNXI_CCU_MUX_WITH_GATE(i2s2_clk, "i2s2", i2s_parents,
-			       0x0b8, 16, 2, BIT(31), 0);
+			       0x0b8, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
 
 static SUNXI_CCU_M_WITH_GATE(spdif_clk, "spdif", "pll-audio",
-			     0x0c0, 0, 4, BIT(31), 0);
+			     0x0c0, 0, 4, BIT(31), CLK_SET_RATE_PARENT);
 
 static SUNXI_CCU_GATE(usb_phy0_clk,	"usb-phy0",	"osc24M",
 		      0x0cc, BIT(8), 0);

@@ -466,7 +466,7 @@ static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve
 			     0x13c, 16, 3, BIT(31), 0);
 
 static SUNXI_CCU_GATE(ac_dig_clk,	"ac-dig",	"pll-audio",
-		      0x140, BIT(31), 0);
+		      0x140, BIT(31), CLK_SET_RATE_PARENT);
 static SUNXI_CCU_GATE(avs_clk,		"avs",		"osc24M",
 		      0x144, BIT(31), 0);
 

Patches currently in stable-queue which might be from [email protected] are

queue-4.9/arm-dts-sun7i-bananapi-m1-plus-enable-usb-phy-for-usb-host-support.patch queue-4.9/clk-sunxi-ng-sun8i-h3-set-clk_set_rate_parent-for-audio-module-clocks.patch queue-4.9/clk-sunxi-ng-sun8i-a23-set-clk_set_rate_parent-for-audio-module-clocks.patch