u-boot-mips/master
Hi Tom,
Travis-CI build is green (one job has failed due to job time limit)
https://travis-ci.org/danielschwierzeck/u-boot/builds/180114376
The following changes since commit 6b29a395b62965eef6b5065d3a526a8588a92038:
Merge git://git.denx.de/u-boot-mpc85xx (2016-11-29 19:42:48 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-mips.git master
for you to fetch changes up to 6fd596a1aa57bd431263f45b0c57ee8ae6b2403c:
MIPS: Fix map_physmem for cached mappings (2016-11-30 16:18:19 +0100)
----------------------------------------------------------------
Daniel Schwierzeck (9):
MIPS: make inclusion of ROM exception vectors configurable
MIPS: fix ROM exception vectors
MIPS: fix iand optimize setup of CP0 registers
MIPS: factor out code for initial stack and global data
MIPS: add possibility to setup initial stack and global data in SRAM
MIPS: add asm-offsets for struct pt_regs
MIPS: reserve space for exception vectors
MIPS: add handling for generic and EJTAG exceptions common/board_f: enable initr_trap for MIPS
Marek Vasut (1):
mips: Let cache.h be included from assembly source
Paul Burton (2):
MIPS: Use ram_top, not bi_memsize, in arch_lmb_reserve
MIPS: Fix map_physmem for cached mappings
arch/mips/Kconfig | 32 +++++++++++++++++++ arch/mips/cpu/start.S | 173 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------------------ arch/mips/include/asm/asm-offsets.h | 5 +++ arch/mips/include/asm/cache.h | 2 ++ arch/mips/include/asm/io.h | 2 +- arch/mips/include/asm/mipsregs.h | 1 + arch/mips/include/asm/system.h | 8 +++++ arch/mips/include/asm/u-boot-mips.h | 4 +++ arch/mips/lib/Makefile | 3 ++ arch/mips/lib/asm-offsets.c | 61 ++++++++++++++++++++++++++++++++++++ arch/mips/lib/bootm.c | 2 +- arch/mips/lib/genex.S | 224 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/mips/lib/stack.c | 19 ++++++++++++ arch/mips/lib/traps.c | 106 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/mips/mach-ath79/Kconfig | 2 ++ arch/mips/mach-pic32/Kconfig | 1 + common/board_r.c | 4 +-- 17 files changed, 584 insertions(+), 65 deletions(-) create mode 100644 arch/mips/include/asm/asm-offsets.h create mode 100644 arch/mips/lib/asm-offsets.c create mode 100644 arch/mips/lib/genex.S create mode 100644 arch/mips/lib/stack.c create mode 100644 arch/mips/lib/traps.c
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Quoted 5 lines · Daniel Schwierzeck
Hi Tom,
Travis-CI build is green (one job has failed due to job time limit)
https://travis-ci.org/danielschwierzeck/u-boot/builds/180114376
Note that if you head to
https://travis-ci.org/danielschwierzeck/u-boot/jobs/180114393 you can tell it to re-start the job and it _should_ complete in time. But that said, that also just failed for me and I think that means I'm going to split it into ARM32 and ARM64 builds so it's not so close to failing due to time.
Quoted 24 lines
The following changes since commit
6b29a395b62965eef6b5065d3a526a8588a92038:Merge
git://git.denx.de/u-boot-mpc85xx(2016-11-29 19:42:48 -0500)are available in the git repository at:
git://git.denx.de/u-boot-mips.gitmasterfor you to fetch changes up to
6fd596a1aa57bd431263f45b0c57ee8ae6b2403c:MIPS: Fix
map_physmemfor cached mappings (2016-11-30 16:18:19 +0100)----------------------------------------------------------------
Daniel Schwierzeck (9):
MIPS: make inclusion of ROM exception vectors configurable
MIPS: fix ROM exception vectors
MIPS: fix iand optimize setup of CP0 registers
MIPS: factor out code for initial stack and global data
MIPS: add possibility to setup initial stack and global data in SRAM
MIPS: add asm-offsets for structpt_regs
MIPS: reserve space for exception vectors
MIPS: add handling for generic and EJTAG exceptions common/board_f: enableinitr_trapfor MIPS
Quoted 2 lines
Marek Vasut (1):
mips: Letcache.hbe included from assembly source
Are there other parts of the Ci20 series you could apply as well? I'm keen to see this (and then Ci40) go in as I have both platforms and would like to get them in mainline and then worked into my test.py framework, thanks!
Signature · 8 lines
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Am 30.11.2016 um 20:01 schrieb Tom Rini:
Quoted 38 lines · Daniel Schwierzeck
Quoted 5 lines
Hi Tom,
Travis-CI build is green (one job has failed due to job time limit)
https://travis-ci.org/danielschwierzeck/u-boot/builds/180114376
Note that if you head to
https://travis-ci.org/danielschwierzeck/u-boot/jobs/180114393 you can tell it to re-start the job and it _should_ complete in time. But that said, that also just failed for me and I think that means I'm going to split it into ARM32 and ARM64 builds so it's not so close to failing due to time.Quoted 24 lines
The following changes since commit
6b29a395b62965eef6b5065d3a526a8588a92038:Merge
git://git.denx.de/u-boot-mpc85xx(2016-11-29 19:42:48 -0500)are available in the git repository at:
git://git.denx.de/u-boot-mips.gitmasterfor you to fetch changes up to
6fd596a1aa57bd431263f45b0c57ee8ae6b2403c:MIPS: Fix
map_physmemfor cached mappings (2016-11-30 16:18:19 +0100)----------------------------------------------------------------
Daniel Schwierzeck (9):
MIPS: make inclusion of ROM exception vectors configurable
MIPS: fix ROM exception vectors
MIPS: fix iand optimize setup of CP0 registers
MIPS: factor out code for initial stack and global data
MIPS: add possibility to setup initial stack and global data in SRAM
MIPS: add asm-offsets for structpt_regs
MIPS: reserve space for exception vectors
MIPS: add handling for generic and EJTAG exceptions common/board_f: enableinitr_trapfor MIPS
Quoted 8 lines
Quoted 2 lines
Marek Vasut (1):
mips: Letcache.hbe included from assembly sourceAre there other parts of the Ci20 series you could apply as well? I'm keen to see this (and then Ci40) go in as I have both platforms and would like to get them in mainline and then worked into my
test.pyframework, thanks!
not in this pull request. I'm going to create a new one when the review has finished.
Signature · 9 lines
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Quoted 11 lines · Daniel Schwierzeck
Hi Tom,
Travis-CI build is green (one job has failed due to job time limit)
https://travis-ci.org/danielschwierzeck/u-boot/builds/180114376
The following changes since commit
6b29a395b62965eef6b5065d3a526a8588a92038:Merge
git://git.denx.de/u-boot-mpc85xx(2016-11-29 19:42:48 -0500)
Quoted 8 lines
are available in the git repository at:
git://git.denx.de/u-boot-mips.gitmasterfor you to fetch changes up to
6fd596a1aa57bd431263f45b0c57ee8ae6b2403c:MIPS: Fix
map_physmemfor cached mappings (2016-11-30 16:18:19 +0100)
Applied to u-boot/master, thanks!
Signature · 8 lines
Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20161130/79964ac6/attachment.sig>