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Patch "hwrng: omap - Do not access INTMASK_REG on EIP76" has been added to the 4.10-stable tree

PATCH [email protected] 1 participant 1 message Mar 24, 2017

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This is a note to let you know that I've just added the patch titled

hwrng: omap - Do not access INTMASK_REG on EIP76

to the 4.10-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
hwrng-omap-do-not-access-intmask_reg-on-eip76.patch
and it can be found in the queue-4.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From b985735be7afea3a5e0570ce2ea0b662c0e12e19 Mon Sep 17 00:00:00 2001

From: Thomas Petazzoni <[email protected]>
Date: Tue, 7 Mar 2017 15:14:48 +0100
Subject: hwrng: omap - Do not access INTMASK_REG on EIP76

From: Thomas Petazzoni <[email protected]>

commit b985735be7afea3a5e0570ce2ea0b662c0e12e19 upstream.

The INTMASK_REG register does not exist on EIP76. Due to this, the call:

   omap_rng_write(priv, RNG_INTMASK_REG, RNG_SHUTDOWN_OFLO_MASK);

ends up, through the reg_map_eip76[] array, in accessing the register at offset 0, which is the RNG_OUTPUT_0_REG. This by itself doesn't cause any problem, but clearly doesn't enable the interrupt as it was expected.

On EIP76, the register that allows to enable the interrupt is RNG_CONTROL_REG. And just like RNG_INTMASK_REG, it's bit 1 of this register that allows to enable the shutdown_oflo interrupt.

Fixes 383212425c926 ("hwrng: omap - Add device variant for SafeXcel IP-76 found in Armada 8K")
---
 drivers/char/hw_random/omap-rng.c |   13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)
drivers/char/hw_random/omap-rng.c +12 -1
@@ -408,7 +408,18 @@ static int of_get_omap_rng_device_detail
 						    "err = %d\n", err);
 		}
 
-		omap_rng_write(priv, RNG_INTMASK_REG, RNG_SHUTDOWN_OFLO_MASK);
+		/*
+		 * On OMAP4, enabling the shutdown_oflo interrupt is
+		 * done in the interrupt mask register. There is no
+		 * such register on EIP76, and it's enabled by the
+		 * same bit in the control register
+		 */
+		if (priv->pdata->regs[RNG_INTMASK_REG])
+			omap_rng_write(priv, RNG_INTMASK_REG,
+				       RNG_SHUTDOWN_OFLO_MASK);
+		else
+			omap_rng_write(priv, RNG_CONTROL_REG,
+				       RNG_SHUTDOWN_OFLO_MASK);
 	}
 	return 0;
 }

Patches currently in stable-queue which might be from [email protected] are

queue-4.10/hwrng-omap-use-devm_clk_get-instead-of-of_clk_get.patch queue-4.10/hwrng-omap-do-not-access-intmask_reg-on-eip76.patch queue-4.10/hwrng-omap-write-registers-after-enabling-the-clock.patch