arm: i.MX6: SabreSD: Add initial dts support
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cover arm: i.MX6: SabreSD: Add initial dts support
From: Jagan Teki <[email protected]>
This series add initial devicetree support for i.MX6 Quad and Quad Plus SabreSD boards. Since fdt require some more time to stable, this series add new defconfigs for quad and quadplus boards by make other deconfigs unchange.
Once more fdt nodes and proper testing is done, the legacy defconfigs along with other imximage files will remove.
thanks!
Jagan.
Jagan Teki (5):
arm: dts: i.MX6: Add imx6qdl-sabresd.dtsi
arm: dts: imx6qdl-sabresd: Add imx6q-sabresd.dts
arm: imx6q: sabresd: Add initial devicetree support
arm: dts: imx6qdl-sabresd: Add imx6qp-sabresd.dts
arm: imx6qp: sabresd: Add initial devicetree support
arch/arm/dts/Makefile | 2 + arch/arm/dts/imx6q-sabresd.dts | 21 ++++++ arch/arm/dts/imx6qdl-sabresd.dtsi | 113 +++++++++++++++++++++++++++++ arch/arm/dts/imx6qp-sabresd.dts | 85 ++++++++++++++++++++++ board/freescale/mx6sabresd/MAINTAINERS | 2 + board/freescale/mx6sabresd/mx6sabresd.c | 122 +++++++++++++++++++++----------- configs/imx6q_sabresd_defconfig | 59 +++++++++++++++ configs/imx6qp_sabresd_defconfig | 60 ++++++++++++++++ include/configs/mx6sabresd.h | 4 ++ 9 files changed, 428 insertions(+), 40 deletions(-) create mode 100644 arch/arm/dts/imx6q-sabresd.dts create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi create mode 100644 arch/arm/dts/imx6qp-sabresd.dts create mode 100644 configs/imx6q_sabresd_defconfig create mode 100644 configs/imx6qp_sabresd_defconfig
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1.9.1
PATCH 1/5 arm: dts: i.MX6: Add imx6qdl-sabresd.dtsi
From: Jagan Teki <[email protected]>
Add common minimal dtsi file for i.MX6QDL Sabresd boards,
- uart1
- usdhc2
- usdhc3
- usdhc4
--- arch/arm/dts/imx6qdl-sabresd.dtsi | 111 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 111 insertions(+) create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi
arch/arm/dts/imx6qdl-sabresd.dtsi new file +111 -0
@@ -0,0 +1,111 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <dt-bindings/gpio/gpio.h> + +/ { + chosen { + stdout-path = &uart1; + }; + + memory { + reg = <0x10000000 0x40000000>; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <8>; + cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <8>; + cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + bus-width = <8>; + non-removable; + no-1-8-v; + status = "okay"; +}; + +&iomuxc { + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 + MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 + MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 + MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + >; + }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 + >; + }; +};
Signature · 1 line
1.9.1
PATCH 2/5 arm: dts: imx6qdl-sabresd: Add imx6q-sabresd.dts
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add initial dts support for i.MX6 Quad Sabresd board.
--- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6q-sabresd.dts | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) create mode 100644 arch/arm/dts/imx6q-sabresd.dts
arch/arm/dts/Makefile +1 -0
@@ -317,6 +317,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6dl-icore-rqs.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ + imx6q-sabresd.dtb \ imx6sx-sabreauto.dtb \ imx6ul-geam-kit.dtb \ imx6ul-isiot-emmc.dtb \
arch/arm/dts/imx6q-sabresd.dts new file +21 -0
@@ -0,0 +1,21 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; + +#include "imx6q.dtsi" +#include "imx6qdl-sabresd.dtsi" + +/ { + model = "Freescale i.MX6 Quad SABRE Smart Device Board"; + compatible = "fsl,imx6q-sabresd", "fsl,imx6q"; +};
Signature · 1 line
1.9.1
PATCH 3/5 arm: imx6q: sabresd: Add initial devicetree support
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add initial devicetree support for i.MX6 Quad Sabresd board.
--- board/freescale/mx6sabresd/MAINTAINERS | 1 + board/freescale/mx6sabresd/mx6sabresd.c | 122 +++++++++++++++++++++----------- configs/imx6q_sabresd_defconfig | 59 +++++++++++++++ include/configs/mx6sabresd.h | 4 ++ 4 files changed, 146 insertions(+), 40 deletions(-) create mode 100644 configs/imx6q_sabresd_defconfig
board/freescale/mx6sabresd/MAINTAINERS +1 -0
@@ -6,3 +6,4 @@ F: include/configs/mx6sabresd.h F: configs/mx6dlsabresd_defconfig F: configs/mx6qsabresd_defconfig F: configs/mx6sabresd_spl_defconfig +F: configs/imx6q_sabresd_defconfig
board/freescale/mx6sabresd/mx6sabresd.c +82 -40
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configs/imx6q_sabresd_defconfig new file +59 -0
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include/configs/mx6sabresd.h +4 -0
@@ -11,6 +11,10 @@#ifdef CONFIG_SPL #include "imx6_spl.h" +# ifdef CONFIG_SPL_BUILD +# undef CONFIG_DM_GPIO +# undef CONFIG_DM_MMC +# endif #endif #define CONFIG_MACH_TYPE 3980
Signature · 1 line
1.9.1
PATCH 4/5 arm: dts: imx6qdl-sabresd: Add imx6qp-sabresd.dts
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add initial dts support for i.MX6 Quad Plus Sabresd board.
--- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6qdl-sabresd.dtsi | 96 ++++++++++++++++++++------------------- arch/arm/dts/imx6qp-sabresd.dts | 85 ++++++++++++++++++++++++++++++++++ 3 files changed, 135 insertions(+), 47 deletions(-) create mode 100644 arch/arm/dts/imx6qp-sabresd.dts
arch/arm/dts/Makefile +1 -0
@@ -318,6 +318,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ imx6q-sabresd.dtb \ + imx6qp-sabresd.dtb \ imx6sx-sabreauto.dtb \ imx6ul-geam-kit.dtb \ imx6ul-isiot-emmc.dtb \
arch/arm/dts/imx6qdl-sabresd.dtsi +49 -47
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arch/arm/dts/imx6qp-sabresd.dts new file +85 -0
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1.9.1
PATCH 5/5 arm: imx6qp: sabresd: Add initial devicetree support
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add initial dts support for i.MX6 Quad Plus Sabresd board.
Boot from MMC:
-------------
U-Boot SPL 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29) Trying to boot from MMC1
U-Boot 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29 +0530)
CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C) at 29C Reset cause: POR Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board Board: MX6-SabreSD I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
*** Warning - bad CRC, using default environment
gpio at 020a4000: dir_output: error: gpio GPIO3_19 not reserved gpio at 020a4000: set_value: error: gpio GPIO3_19 not reserved gpio at 020b4000: dir_output: error: gpio GPIO7_12 not reserved gpio at 020b4000: set_value: error: gpio GPIO7_12 not reserved PCI: pcie phy link never came up No panel detected: default to Hannstar-XGA gpio at 0209c000: dir_output: error: gpio GPIO1_21 not reserved Display: Hannstar-XGA (1024x768) In: serial Out: serial Err: serial Net: gpio at 0209c000: dir_output: error: gpio GPIO1_25 not reserved gpio at 0209c000: set_value: error: gpio GPIO1_25 not reserved
FEC [PRIME]
Hit any key to stop autoboot: 0
=>
--- board/freescale/mx6sabresd/MAINTAINERS | 1 + configs/imx6qp_sabresd_defconfig | 60 ++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 configs/imx6qp_sabresd_defconfig
board/freescale/mx6sabresd/MAINTAINERS +1 -0
@@ -7,3 +7,4 @@ F: configs/mx6dlsabresd_defconfig F: configs/mx6qsabresd_defconfig F: configs/mx6sabresd_spl_defconfig F: configs/imx6q_sabresd_defconfig +F: configs/imx6qp_sabresd_defconfig
configs/imx6qp_sabresd_defconfig new file +60 -0
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Signature · 1 line
1.9.1