FAILED: patch "[PATCH] powerpc: Disable HFSCR[TM] if TM is not supported" failed to apply to 4.4-stable tree
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[email protected]
maintainerThe patch below does not apply to the 4.4-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
Quoted 1 line
From
7ed23e1bae8bf7e37fd555066550a00b95a3a98bMon Sep 17 00:00:00 2001
From: Benjamin Herrenschmidt <[email protected]>
Date: Mon, 20 Mar 2017 17:49:03 +1100
Subject: [PATCH] powerpc: Disable HFSCR[TM] if TM is not supported
On Power8 & Power9 the early CPU inititialisation in __init_HFSCR() turns on HFSCR[TM] (Hypervisor Facility Status and Control Register [Transactional Memory]), but that doesn't take into account that TM might be disabled by CPU features, or disabled by the kernel being built with CONFIG_PPC_TRANSACTIONAL_MEM=n.
So later in boot, when we have setup the CPU features, clear HSCR[TM] if the TM CPU feature has been disabled. We use CPU_FTR_TM_COMP to account for the CONFIG_PPC_TRANSACTIONAL_MEM=n case.
Without this a KVM guest might try use TM, even if told not to, and cause an oops in the host kernel. Typically the oops is seen in __kvmppc_vcore_entry() and may or may not be fatal to the host, but is always bad news.
In practice all shipping CPU revisions do support TM, and all host kernels we are aware of build with TM support enabled, so no one should actually be able to hit this in the wild.
arch/powerpc/kernel/setup_64.c +9 -0
@@ -236,6 +236,15 @@ static void cpu_ready_for_interrupts(void)mtspr (SPRN_LPCR , lpcr |LPCR_AIL_3 ); } +/* +* Fixup HFSCR:TM based on CPU features. The bit is set by our +* early asm init because at that point we haven't updated our +* CPU features from firmware and device-tree. Here we have, +* so let's do it. +*/ +if (cpu_has_feature (CPU_FTR_HVMODE ) && !cpu_has_feature (CPU_FTR_TM_COMP )) +mtspr (SPRN_HFSCR ,mfspr (SPRN_HFSCR ) & ~HFSCR_TM ); +/* Set IR and DR in PACA MSR */ get_paca ()->kernel_msr =MSR_KERNEL ; }