i.MX6: Engicam: Move common board code
Subsystems (2)
cover i.MX6: Engicam: Move common board code
From: Jagan Teki <[email protected]>
Engicam boards have some common code, so move them as
(1) SPL board_init_f and UART MUX init to common/spl.c
(2) board_init, dram_init, board_late_init and mmc_late_init to common/board.c
This series also add board_fit_config_name_match to make SPL to pick suitable fdt, so reduced few defconifg files.
thanks!
Jagan.
Jagan Teki (16):
icorem6: Add modeboot env via board_late_init
icorem6: Add mmc_late_init
geam6ul: Add modeboot env via board_late_init
geam6ul: Add mmc_late_init
engicam: Set fdt_file env during run-time
icorem6: Make SPL to pick suitable fdt
engicam: Move uart mux init to SPL
icorem6: Use proper iomux_ddr_regs drive strength values
icorem6: Use drive strength macros
i.MX6UL: geam6ul: Add SETUP_IOMUX_PADS
isiot: Fix to use usdhc2_pads for mmc2
i.MX6UL: isiot: Add SETUP_IOMUX_PADS icorem6[_rqs]: Move the spl code common geam6/isiot: Move the spl code common
engicam: common: Move common board code
engicam: common: Move board_late_init
arch/arm/cpu/armv7/mx6/Kconfig | 6 +
arch/arm/include/asm/imx-common/iomux-v3.h | 6 +
board/engicam/common/Makefile | 7 +
board/engicam/common/board.c | 82 +++++
board/engicam/common/board.h | 12 +
board/engicam/common/spl.c | 393 +++++++++++++++++++++
board/engicam/geam6ul/geam6ul.c | 206 ++---------
board/engicam/icorem6/MAINTAINERS | 6 +-
board/engicam/icorem6/icorem6.c | 330 +----------------
board/engicam/icorem6_rqs/MAINTAINERS | 3 +-
board/engicam/icorem6_rqs/icorem6_rqs.c | 352 +-----------------
board/engicam/isiotmx6ul/isiotmx6ul.c | 261 +++-----------
configs/imx6dl_icore_mmc_defconfig | 44 ---
configs/imx6dl_icore_nand_defconfig | 45 ---
configs/imx6dl_icore_rqs_mmc_defconfig | 41 ---
configs/imx6q_icore_nand_defconfig | 45 ---
...e_mmc_defconfig => imx6qdl_icore_mmc_defconfig} | 2 +-
...c_defconfig => imx6qdl_icore_rqs_mmc_defconfig} | 2 +-
configs/imx6ul_geam_mmc_defconfig | 1 -
configs/imx6ul_geam_nand_defconfig | 1 -
configs/imx6ul_isiot_emmc_defconfig | 1 -
configs/imx6ul_isiot_mmc_defconfig | 1 -
configs/imx6ul_isiot_nand_defconfig | 1 -
include/configs/imx6qdl_icore.h | 39 +-
include/configs/imx6qdl_icore_rqs.h | 1 -
include/configs/imx6ul_geam.h | 38 +-
include/configs/imx6ul_isiot.h | 1 -
27 files changed, 655 insertions(+), 1272 deletions(-)
create mode 100644 board/engicam/common/Makefile
create mode 100644 board/engicam/common/board.c
create mode 100644 board/engicam/common/board.h
create mode 100644 board/engicam/common/spl.c
delete mode 100644 configs/imx6dl_icore_mmc_defconfig
delete mode 100644 configs/imx6dl_icore_nand_defconfig
delete mode 100644 configs/imx6dl_icore_rqs_mmc_defconfig
delete mode 100644 configs/imx6q_icore_nand_defconfig
rename configs/{imx6q_icore_mmc_defconfig => imx6qdl_icore_mmc_defconfig} (96%)
rename configs/{imx6q_icore_rqs_mmc_defconfig => imx6qdl_icore_rqs_mmc_defconfig} (95%)Signature · 1 line
1.9.1
PATCH 1/16 icorem6: Add modeboot env via board_late_init
From: Jagan Teki <[email protected]>
Add runtime, modeboot env which is setting mmcboot, or nandboot based on the bootdevice so-that conditional macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should be avoided in config files.
--- arch/arm/cpu/armv7/mx6/Kconfig | 1 + board/engicam/icorem6/icorem6.c | 19 +++++++++++++++++++ include/configs/imx6qdl_icore.h | 36 ++++++++++++++++-------------------- 3 files changed, 36 insertions(+), 20 deletions(-)
arch/arm/cpu/armv7/mx6/Kconfig +1 -0
@@ -173,6 +173,7 @@ config TARGET_MX6QARM2 config TARGET_MX6Q_ICORE bool "Support Engicam i.Core" + select BOARD_LATE_INIT select MX6QDL select OF_CONTROL select DM
board/engicam/icorem6/icorem6.c +19 -0
@@ -205,6 +205,25 @@ int board_early_init_f(void)return 0 ; } +int board_late_init (void ) +{ +switch ((imx6_src_get_boot_mode () &IMX6_BMODE_MASK ) >> +IMX6_BMODE_SHIFT ) { +case IMX6_BMODE_SD : +case IMX6_BMODE_ESD : +setenv ("modeboot" ,"mmcboot" ); +break ; +case IMX6_BMODE_NAND : +setenv ("modeboot" ,"nandboot" ); +break ; +default : +setenv ("modeboot" ,"" ); +break ; + } + +return 0 ; +} +int board_init (void ) {/* Address of boot parameters */
include/configs/imx6qdl_icore.h +16 -20
@@ -64,7 +64,7 @@"fitboot=echo Booting FIT image from mmc ...; " \"run mmcargs; " \"bootm ${loadaddr}\0" \ -"mmcboot=echo Booting from mmc ...; " \ +"_mmcboot=run mmcargs; " \"run mmcargs; " \"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \"if run loadfdt; then " \
@@ -79,6 +79,20 @@"else " \"bootm; " \"fi\0" \ +"mmcboot=echo Booting from mmc ...; " \ +"if mmc rescan; then " \ +"if run loadbootscript; then " \ +"run bootscript; " \ +"else " \ +"if run loadfit; then " \ +"run fitboot; " \ +"else " \ +"if run loadimage; then " \ +"run _mmcboot; " \ +"fi; " \ +"fi; " \ +"fi; " \ +"fi\0" \"nandboot=echo Booting from nand ...; " \"if mtdparts; then " \"echo Starting nand boot ...; " \
@@ -90,25 +104,7 @@"nand read ${fdt_addr} dtb 0x100000; " \ "bootm ${loadaddr} - ${fdt_addr}\0" -#ifdef CONFIG_NAND_MXS -# define CONFIG_BOOTCOMMAND "run nandboot" -#else -# define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadfit; then " \ - "run fitboot; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "fi" -#endif +#define CONFIG_BOOTCOMMAND "run $modeboot"/* Miscellaneous configurable options */ #define CONFIG_SYS_MEMTEST_START 0x80000000
Signature · 1 line
1.9.1
PATCH 2/16 icorem6: Add mmc_late_init
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Let the runtime code can set the mmcdev and mmcroot based on the devno using mmc_get_env_dev instead of defining separately in build-time configs using mmc_late_init func.
--- board/engicam/icorem6/icorem6.c | 22 ++++++++++++++++++++++ include/configs/imx6qdl_icore.h | 2 -- 2 files changed, 22 insertions(+), 2 deletions(-)
board/engicam/icorem6/icorem6.c +22 -0
@@ -7,6 +7,7 @@*/ #include <common.h> +#include <mmc.h> #include <asm/io.h> #include <asm/gpio.h>
@@ -205,12 +206,33 @@ int board_early_init_f(void)return 0 ; } +#ifdef CONFIG_ENV_IS_IN_MMC +static void mmc_late_init (void ) +{ +char cmd[32 ]; +char mmcblk[32 ]; +u32 dev_no =mmc_get_env_dev (); + +setenv_ulong ("mmcdev" , dev_no); + +/* Set mmcblk env */ +sprintf (mmcblk,"/dev/mmcblk%dp2 rootwait rw" , dev_no); +setenv ("mmcroot" , mmcblk); + +sprintf (cmd,"mmc dev %d" , dev_no); +run_command (cmd,0 ); +} +#endif +int board_late_init (void ) {switch ((imx6_src_get_boot_mode () &IMX6_BMODE_MASK ) >>IMX6_BMODE_SHIFT ) {case IMX6_BMODE_SD :case IMX6_BMODE_ESD : +#ifdef CONFIG_ENV_IS_IN_MMC +mmc_late_init (); +#endif setenv ("modeboot" ,"mmcboot" );break ;case IMX6_BMODE_NAND :
include/configs/imx6qdl_icore.h +0 -2
@@ -45,9 +45,7 @@"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \"fdt_addr=0x18000000\0" \"boot_fdt=try\0" \ -"mmcdev=0\0" \"mmcpart=1\0" \ -"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \"nandroot=ubi0:rootfs rootfstype=ubifs\0" \"mmcautodetect=yes\0" \"mmcargs=setenv bootargs console=${console},${baudrate} " \
Signature · 1 line
1.9.1
PATCH 3/16 geam6ul: Add modeboot env via board_late_init
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add runtime, modeboot env which is setting mmcboot, or nandboot based on the bootdevice so-that conditional macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should be avoided in config files.
--- arch/arm/cpu/armv7/mx6/Kconfig | 1 + board/engicam/geam6ul/geam6ul.c | 19 +++++++++++++++++++ include/configs/imx6ul_geam.h | 35 ++++++++++++++++------------------- 3 files changed, 36 insertions(+), 19 deletions(-)
arch/arm/cpu/armv7/mx6/Kconfig +1 -0
@@ -257,6 +257,7 @@ config TARGET_MX6UL_14X14_EVK config TARGET_MX6UL_GEAM bool "Support Engicam GEAM6UL" + select BOARD_LATE_INIT select MX6UL select OF_CONTROL select DM
board/engicam/geam6ul/geam6ul.c +19 -0
@@ -103,6 +103,25 @@ static void setup_gpmi_nand(void) }#endif /* CONFIG_NAND_MXS */ +int board_late_init (void ) +{ +switch ((imx6_src_get_boot_mode () &IMX6_BMODE_MASK ) >> +IMX6_BMODE_SHIFT ) { +case IMX6_BMODE_SD : +case IMX6_BMODE_ESD : +setenv ("modeboot" ,"mmcboot" ); +break ; +case IMX6_BMODE_NAND : +setenv ("modeboot" ,"nandboot" ); +break ; +default : +setenv ("modeboot" ,"" ); +break ; + } + +return 0 ; +} +int board_init (void ) {/* Address of boot parameters */
include/configs/imx6ul_geam.h +16 -19
@@ -63,7 +63,7 @@"fitboot=echo Booting FIT image from mmc ...; " \"run mmcargs; " \"bootm ${loadaddr}\0" \ -"mmcboot=echo Booting from mmc ...; " \ +"_mmcboot=run mmcargs; " \"run mmcargs; " \"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \"if run loadfdt; then " \
@@ -78,6 +78,20 @@"else " \"bootm; " \"fi\0" \ +"mmcboot=echo Booting from mmc ...; " \ +"if mmc rescan; then " \ +"if run loadbootscript; then " \ +"run bootscript; " \ +"else " \ +"if run loadfit; then " \ +"run fitboot; " \ +"else " \ +"if run loadimage; then " \ +"run _mmcboot; " \ +"fi; " \ +"fi; " \ +"fi; " \ +"fi\0" \"nandboot=echo Booting from nand ...; " \"if mtdparts; then " \"echo Starting nand boot ...; " \
@@ -89,24 +103,7 @@"nand read ${fdt_addr} dtb 0x100000; " \ "bootm ${loadaddr} - ${fdt_addr}\0" -#ifdef CONFIG_NAND_MXS -# define CONFIG_BOOTCOMMAND "run nandboot" -#else -# define CONFIG_BOOTCOMMAND \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadfit; then " \ - "run fitboot; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "fi" -#endif +#define CONFIG_BOOTCOMMAND "run $modeboot"/* Miscellaneous configurable options */ #define CONFIG_SYS_MEMTEST_START 0x80000000
Signature · 1 line
1.9.1
PATCH 4/16 geam6ul: Add mmc_late_init
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Let the runtime code can set the mmcdev and mmcroot based on the devno using mmc_get_env_dev instead of defining separately in build-time configs using mmc_late_init func.
--- board/engicam/geam6ul/geam6ul.c | 22 ++++++++++++++++++++++ include/configs/imx6ul_geam.h | 2 -- 2 files changed, 22 insertions(+), 2 deletions(-)
board/engicam/geam6ul/geam6ul.c +22 -0
@@ -7,6 +7,7 @@*/ #include <common.h> +#include <mmc.h> #include <asm/io.h> #include <asm/gpio.h>
@@ -103,12 +104,33 @@ static void setup_gpmi_nand(void) }#endif /* CONFIG_NAND_MXS */ +#ifdef CONFIG_ENV_IS_IN_MMC +static void mmc_late_init (void ) +{ +char cmd[32 ]; +char mmcblk[32 ]; +u32 dev_no =mmc_get_env_dev (); + +setenv_ulong ("mmcdev" , dev_no); + +/* Set mmcblk env */ +sprintf (mmcblk,"/dev/mmcblk%dp2 rootwait rw" , dev_no); +setenv ("mmcroot" , mmcblk); + +sprintf (cmd,"mmc dev %d" , dev_no); +run_command (cmd,0 ); +} +#endif +int board_late_init (void ) {switch ((imx6_src_get_boot_mode () &IMX6_BMODE_MASK ) >>IMX6_BMODE_SHIFT ) {case IMX6_BMODE_SD :case IMX6_BMODE_ESD : +#ifdef CONFIG_ENV_IS_IN_MMC +mmc_late_init (); +#endif setenv ("modeboot" ,"mmcboot" );break ;case IMX6_BMODE_NAND :
include/configs/imx6ul_geam.h +0 -2
@@ -44,9 +44,7 @@"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \"fdt_addr=0x87800000\0" \"boot_fdt=try\0" \ -"mmcdev=0\0" \"mmcpart=1\0" \ -"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \"nandroot=ubi0:rootfs rootfstype=ubifs\0" \"mmcautodetect=yes\0" \"mmcargs=setenv bootargs console=${console},${baudrate} " \
Signature · 1 line
1.9.1
PATCH 5/16 engicam: Set fdt_file env during run-time
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Set fdt_file env variable during board_late_init
--- board/engicam/geam6ul/geam6ul.c | 3 +++ board/engicam/icorem6/icorem6.c | 5 +++++ board/engicam/icorem6_rqs/icorem6_rqs.c | 5 +++++ board/engicam/isiotmx6ul/isiotmx6ul.c | 8 ++++++++ configs/imx6dl_icore_mmc_defconfig | 1 - configs/imx6dl_icore_nand_defconfig | 1 - configs/imx6dl_icore_rqs_mmc_defconfig | 1 - configs/imx6q_icore_mmc_defconfig | 1 - configs/imx6q_icore_nand_defconfig | 1 - configs/imx6q_icore_rqs_mmc_defconfig | 1 - configs/imx6ul_geam_mmc_defconfig | 1 - configs/imx6ul_geam_nand_defconfig | 1 - configs/imx6ul_isiot_emmc_defconfig | 1 - configs/imx6ul_isiot_mmc_defconfig | 1 - configs/imx6ul_isiot_nand_defconfig | 1 - include/configs/imx6qdl_icore.h | 1 - include/configs/imx6qdl_icore_rqs.h | 1 - include/configs/imx6ul_geam.h | 1 - include/configs/imx6ul_isiot.h | 1 - 19 files changed, 21 insertions(+), 15 deletions(-)
board/engicam/geam6ul/geam6ul.c +3 -0
@@ -141,6 +141,9 @@ int board_late_init(void)break ; } +if (is_mx6ul ()) +setenv ("fdt_file" ,"imx6ul-geam-kit.dtb" ); +return 0 ; }
board/engicam/icorem6/icorem6.c +5 -0
@@ -243,6 +243,11 @@ int board_late_init(void)break ; } +if (is_mx6dq ()) +setenv ("fdt_file" ,"imx6q-icore.dtb" ); +else if (is_mx6dl () ||is_mx6solo ()) +setenv ("fdt_file" ,"imx6dl-icore.dtb" ); +return 0 ; }
board/engicam/icorem6_rqs/icorem6_rqs.c +5 -0
@@ -88,6 +88,11 @@ int board_late_init(void)break ; } +if (is_mx6dq ()) +setenv ("fdt_file" ,"imx6q-icore-rqs.dtb" ); +else if (is_mx6dl () ||is_mx6solo ()) +setenv ("fdt_file" ,"imx6dl-icore-rqs.dtb" ); +return 0 ; }
board/engicam/isiotmx6ul/isiotmx6ul.c +8 -0
@@ -149,6 +149,14 @@ int board_late_init(void)break ; } +if (is_mx6ul ()) { +#ifdef CONFIG_ENV_IS_IN_MMC +setenv ("fdt_file" ,"imx6ul-isiot-emmc.dtb" ); +#else +setenv ("fdt_file" ,"imx6ul-isiot-nand.dtb" ); +#endif + } +return 0 ; }
configs/imx6dl_icore_mmc_defconfig +0 -1
@@ -15,7 +15,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" CONFIG_BOOTDELAY=3 -CONFIG_DEFAULT_FDT_FILE="imx6dl-icore.dtb" CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y
configs/imx6dl_icore_nand_defconfig +0 -1
@@ -14,7 +14,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_NAND" CONFIG_BOOTDELAY=3 -CONFIG_DEFAULT_FDT_FILE="imx6dl-icore.dtb" CONFIG_SPL=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y
configs/imx6dl_icore_rqs_mmc_defconfig +0 -1
@@ -14,7 +14,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" CONFIG_BOOTDELAY=3 -CONFIG_DEFAULT_FDT_FILE="imx6dl-icore-rqs.dtb" CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y
configs/imx6q_icore_mmc_defconfig +0 -1
@@ -15,7 +15,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" CONFIG_BOOTDELAY=3 -CONFIG_DEFAULT_FDT_FILE="imx6q-icore.dtb" CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y
configs/imx6q_icore_nand_defconfig +0 -1
@@ -14,7 +14,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_NAND" CONFIG_BOOTDELAY=3 -CONFIG_DEFAULT_FDT_FILE="imx6q-icore.dtb" CONFIG_SPL=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y
configs/imx6q_icore_rqs_mmc_defconfig +0 -1
@@ -14,7 +14,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" CONFIG_BOOTDELAY=3 -CONFIG_DEFAULT_FDT_FILE="imx6q-icore-rqs.dtb" CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y
configs/imx6ul_geam_mmc_defconfig +0 -1
@@ -14,7 +14,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" CONFIG_BOOTDELAY=3 -CONFIG_DEFAULT_FDT_FILE="imx6ul-geam-kit.dtb" CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y
configs/imx6ul_geam_nand_defconfig +0 -1
@@ -13,7 +13,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_NAND" CONFIG_BOOTDELAY=3 -CONFIG_DEFAULT_FDT_FILE="imx6ul-geam-kit.dtb" CONFIG_SPL=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y
configs/imx6ul_isiot_emmc_defconfig +0 -1
@@ -14,7 +14,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" CONFIG_BOOTDELAY=3 -CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-emmc.dtb" CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y
configs/imx6ul_isiot_mmc_defconfig +0 -1
@@ -14,7 +14,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" CONFIG_BOOTDELAY=3 -CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-emmc.dtb" CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y
configs/imx6ul_isiot_nand_defconfig +0 -1
@@ -13,7 +13,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_NAND" CONFIG_BOOTDELAY=3 -CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-nand.dtb" CONFIG_SPL=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y
include/configs/imx6qdl_icore.h +0 -1
@@ -42,7 +42,6 @@"fit_image=fit.itb\0" \"console=ttymxc3\0" \"fdt_high=0xffffffff\0" \ -"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \"fdt_addr=0x18000000\0" \"boot_fdt=try\0" \"mmcpart=1\0" \
include/configs/imx6qdl_icore_rqs.h +0 -1
@@ -37,7 +37,6 @@"fit_image=fit.itb\0" \"console=ttymxc3\0" \"fdt_high=0xffffffff\0" \ -"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \"fdt_addr=0x18000000\0" \"boot_fdt=try\0" \"mmcpart=1\0" \
include/configs/imx6ul_geam.h +0 -1
@@ -41,7 +41,6 @@"fit_image=fit.itb\0" \"console=ttymxc0\0" \"fdt_high=0xffffffff\0" \ -"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \"fdt_addr=0x87800000\0" \"boot_fdt=try\0" \"mmcpart=1\0" \
include/configs/imx6ul_isiot.h +0 -1
@@ -42,7 +42,6 @@"splashpos=m,m\0" \"console=ttymxc0\0" \"fdt_high=0xffffffff\0" \ -"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \"fdt_addr=0x87800000\0" \"boot_fdt=try\0" \"mmcpart=1\0" \
Signature · 1 line
1.9.1
PATCH 6/16 icorem6: Make SPL to pick suitable fdt
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
SPL FIT is able to pick the suitable fdt file for u-boot, so add that function through board_fit_config_name_match.
---
arch/arm/cpu/armv7/mx6/Kconfig | 4 ++
board/engicam/icorem6/MAINTAINERS | 6 +--
board/engicam/icorem6/icorem6.c | 12 ++++++
board/engicam/icorem6_rqs/MAINTAINERS | 3 +-
board/engicam/icorem6_rqs/icorem6_rqs.c | 12 ++++++
configs/imx6dl_icore_mmc_defconfig | 43 ---------------------
configs/imx6dl_icore_nand_defconfig | 44 ----------------------
configs/imx6dl_icore_rqs_mmc_defconfig | 40 --------------------
configs/imx6q_icore_nand_defconfig | 44 ----------------------
...e_mmc_defconfig => imx6qdl_icore_mmc_defconfig} | 1 +
...c_defconfig => imx6qdl_icore_rqs_mmc_defconfig} | 1 +
11 files changed, 33 insertions(+), 177 deletions(-)
delete mode 100644 configs/imx6dl_icore_mmc_defconfig
delete mode 100644 configs/imx6dl_icore_nand_defconfig
delete mode 100644 configs/imx6dl_icore_rqs_mmc_defconfig
delete mode 100644 configs/imx6q_icore_nand_defconfig
rename configs/{imx6q_icore_mmc_defconfig => imx6qdl_icore_mmc_defconfig} (96%)
rename configs/{imx6q_icore_rqs_mmc_defconfig => imx6qdl_icore_rqs_mmc_defconfig} (95%)arch/arm/cpu/armv7/mx6/Kconfig +4 -0
@@ -176,6 +176,7 @@ config TARGET_MX6Q_ICORE select BOARD_LATE_INIT select MX6QDL select OF_CONTROL + select SPL_OF_LIBFDT select DM select DM_ETH select DM_GPIO
@@ -183,12 +184,14 @@ config TARGET_MX6Q_ICORE select DM_MMC select DM_THERMAL select SUPPORT_SPL + select SPL_LOAD_FIT config TARGET_MX6Q_ICORE_RQS bool "Support Engicam i.Core RQS" select BOARD_LATE_INIT select MX6QDL select OF_CONTROL + select SPL_OF_LIBFDT select DM select DM_ETH select DM_GPIO
@@ -196,6 +199,7 @@ config TARGET_MX6Q_ICORE_RQS select DM_MMC select DM_THERMAL select SUPPORT_SPL + select SPL_LOAD_FIT config TARGET_MX6QSABREAUTO bool "mx6qsabreauto"
board/engicam/icorem6/MAINTAINERS +2 -4
@@ -3,10 +3,8 @@ M: Jagan Teki <[email protected]> S: Maintained F: board/engicam/icorem6 F: include/configs/imx6qdl_icore.h -F: configs/imx6q_icore_mmc_defconfig -F: configs/imx6q_icore_nand_defconfig -F: configs/imx6dl_icore_mmc_defconfig -F: configs/imx6dl_icore_nand_defconfig +F: configs/imx6qdl_icore_mmc_defconfig +F: configs/imx6qdl_icore_nand_defconfig F: arch/arm/dts/imx6qdl-icore.dtsi F: arch/arm/dts/imx6q-icore.dts F: arch/arm/dts/imx6dl-icore.dts
board/engicam/icorem6/icorem6.c +12 -0
@@ -353,6 +353,18 @@ int board_mmc_init(bd_t *bis) }#endif +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match (const char *name) +{ +if (is_mx6dq () && !strcmp (name,"imx6q-icore" )) +return 0 ; +else if ((is_mx6dl () ||is_mx6solo ()) && !strcmp (name,"imx6dl-icore" )) +return 0 ; +else +return -1 ; +} +#endif +/* * Driving strength: * 0x30 == 40 Ohm
board/engicam/icorem6_rqs/MAINTAINERS +1 -2
@@ -3,8 +3,7 @@ M: Jagan Teki <[email protected]> S: Maintained F: board/engicam/icorem6_rqs F: include/configs/imx6qdl_icore_rqs.h -F: configs/imx6q_icore_rqs_mmc_defconfig -F: configs/imx6dl_icore_rqs_mmc_defconfig +F: configs/imx6qdl_icore_rqs_mmc_defconfig F: arch/arm/dts/imx6qdl-icore-rqs.dtsi F: arch/arm/dts/imx6q-icore-rqs.dts F: arch/arm/dts/imx6dl-icore-rqs.dts
board/engicam/icorem6_rqs/icorem6_rqs.c +12 -0
@@ -224,6 +224,18 @@ void board_boot_order(u32 *spl_boot_list)#endif #endif +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match (const char *name) +{ +if (is_mx6dq () && !strcmp (name,"imx6q-icore-rqs" )) +return 0 ; +else if ((is_mx6dl () ||is_mx6solo ()) && !strcmp (name,"imx6dl-icore-rqs" )) +return 0 ; +else +return -1 ; +} +#endif +/* * Driving strength: * 0x30 == 40 Ohm
configs/imx6dl_icore_mmc_defconfig deleted +0 -43
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configs/imx6dl_icore_nand_defconfig deleted +0 -44
44 lines not on this page · raw message
configs/imx6dl_icore_rqs_mmc_defconfig deleted +0 -40
@@ -1,40 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX6=y -CONFIG_SPL_GPIO_SUPPORT=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ICORE_RQS=y -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -# CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore-rqs" -CONFIG_FIT=y -CONFIG_FIT_SIGNATURE=y -CONFIG_FIT_VERBOSE=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" -CONFIG_BOOTDELAY=3 -CONFIG_SPL=y -CONFIG_SPL_EXT_SUPPORT=y -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="icorem6qdl-rqs> " -# CONFIG_CMD_IMLS is not set -CONFIG_CMD_MEMTEST=y -CONFIG_CMD_MMC=y -CONFIG_CMD_I2C=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -# CONFIG_BLK is not set -CONFIG_SYS_I2C_MXC=y -# CONFIG_DM_MMC_OPS is not set -CONFIG_FEC_MXC=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_IMX6=y -CONFIG_MXC_UART=y
configs/imx6q_icore_nand_defconfig deleted +0 -44
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configs/imx6qdl_icore_mmc_defconfig renamed from configs/imx6q_icore_mmc_defconfig +1 -0
@@ -10,6 +10,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" +CONFIG_OF_LIST="imx6q-icore imx6dl-icore" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y
configs/imx6qdl_icore_rqs_mmc_defconfig renamed from configs/imx6q_icore_rqs_mmc_defconfig +1 -0
@@ -9,6 +9,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" +CONFIG_OF_LIST="imx6q-icore-rqs imx6dl-icore-rqs" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y
Signature · 1 line
1.9.1
PATCH 7/16 engicam: Move uart mux init to SPL
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Since, u-boot handle fdt through uart so move the UART code to SPL instead make it to global area.
--- board/engicam/geam6ul/geam6ul.c | 27 ++++++++++----------------- board/engicam/icorem6/icorem6.c | 27 ++++++++++----------------- board/engicam/icorem6_rqs/icorem6_rqs.c | 27 ++++++++++----------------- board/engicam/isiotmx6ul/isiotmx6ul.c | 27 ++++++++++----------------- 4 files changed, 40 insertions(+), 68 deletions(-)
board/engicam/geam6ul/geam6ul.c +10 -17
@@ -22,22 +22,6 @@DECLARE_GLOBAL_DATA_PTR ; -#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const uart1_pads[] = { -MX6_PAD_UART1_TX_DATA__UART1_DCE_TX |MUX_PAD_CTRL (UART_PAD_CTRL ), -MX6_PAD_UART1_RX_DATA__UART1_DCE_RX |MUX_PAD_CTRL (UART_PAD_CTRL ), -}; - -int board_early_init_f (void ) -{ -imx_iomux_v3_setup_multiple_pads (uart1_pads,ARRAY_SIZE (uart1_pads)); - -return 0 ; -} -#ifdef CONFIG_NAND_MXS #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
@@ -173,6 +157,15 @@ int dram_init(void)#include <asm/arch/crm_regs.h> #include <asm/arch/mx6-ddr.h> +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart1_pads[] = { +MX6_PAD_UART1_TX_DATA__UART1_DCE_TX |MUX_PAD_CTRL (UART_PAD_CTRL ), +MX6_PAD_UART1_RX_DATA__UART1_DCE_RX |MUX_PAD_CTRL (UART_PAD_CTRL ), +}; +/* MMC board initialization is needed till adding DM support in SPL */ #if defined(CONFIG_FSL_ESDHC ) && !defined(CONFIG_DM_MMC )#include <mmc.h>
@@ -341,7 +334,7 @@ void board_init_f(ulong dummy)ccgr_init ();/* iomux and setup of i2c */ -board_early_init_f (); +imx_iomux_v3_setup_multiple_pads (uart1_pads,ARRAY_SIZE (uart1_pads));/* setup GP timer */ timer_init ();
board/engicam/icorem6/icorem6.c +10 -17
@@ -23,15 +23,6 @@DECLARE_GLOBAL_DATA_PTR ; -#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const uart4_pads[] = { -IOMUX_PADS (PAD_KEY_COL0__UART4_TX_DATA |MUX_PAD_CTRL (UART_PAD_CTRL )), -IOMUX_PADS (PAD_KEY_ROW0__UART4_RX_DATA |MUX_PAD_CTRL (UART_PAD_CTRL )), -}; -#ifdef CONFIG_NAND_MXS #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
@@ -199,13 +190,6 @@ static void setup_display(void) }#endif /* CONFIG_VIDEO_IPUV3 */ -int board_early_init_f (void ) -{ -SETUP_IOMUX_PADS (uart4_pads); - -return 0 ; -} -#ifdef CONFIG_ENV_IS_IN_MMC static void mmc_late_init (void ) {
@@ -281,6 +265,15 @@ int dram_init(void)#include <asm/arch/crm_regs.h> #include <asm/arch/mx6-ddr.h> +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart4_pads[] = { +IOMUX_PADS (PAD_KEY_COL0__UART4_TX_DATA |MUX_PAD_CTRL (UART_PAD_CTRL )), +IOMUX_PADS (PAD_KEY_ROW0__UART4_RX_DATA |MUX_PAD_CTRL (UART_PAD_CTRL )), +}; +/* MMC board initialization is needed till adding DM support in SPL */ #if defined(CONFIG_FSL_ESDHC ) && !defined(CONFIG_DM_MMC )#include <mmc.h>
@@ -617,7 +610,7 @@ void board_init_f(ulong dummy)gpr_init ();/* iomux */ -board_early_init_f (); +SETUP_IOMUX_PADS (uart4_pads);/* setup GP timer */ timer_init ();
board/engicam/icorem6_rqs/icorem6_rqs.c +10 -17
@@ -22,22 +22,6 @@DECLARE_GLOBAL_DATA_PTR ; -#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const uart4_pads[] = { -IOMUX_PADS (PAD_KEY_COL0__UART4_TX_DATA |MUX_PAD_CTRL (UART_PAD_CTRL )), -IOMUX_PADS (PAD_KEY_ROW0__UART4_RX_DATA |MUX_PAD_CTRL (UART_PAD_CTRL )), -}; - -int board_early_init_f (void ) -{ -SETUP_IOMUX_PADS (uart4_pads); - -return 0 ; -} -int board_init (void ) {/* Address of boot parameters */
@@ -110,6 +94,15 @@ int dram_init(void)#include <asm/arch/crm_regs.h> #include <asm/arch/mx6-ddr.h> +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart4_pads[] = { +IOMUX_PADS (PAD_KEY_COL0__UART4_TX_DATA |MUX_PAD_CTRL (UART_PAD_CTRL )), +IOMUX_PADS (PAD_KEY_ROW0__UART4_RX_DATA |MUX_PAD_CTRL (UART_PAD_CTRL )), +}; +/* MMC board initialization is needed till adding DM support in SPL */ #if defined(CONFIG_FSL_ESDHC ) && !defined(CONFIG_DM_MMC )#include <mmc.h>
@@ -488,7 +481,7 @@ void board_init_f(ulong dummy)gpr_init ();/* iomux */ -board_early_init_f (); +SETUP_IOMUX_PADS (uart4_pads);/* setup GP timer */ timer_init ();
board/engicam/isiotmx6ul/isiotmx6ul.c +10 -17
@@ -22,22 +22,6 @@DECLARE_GLOBAL_DATA_PTR ; -#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const uart1_pads[] = { -MX6_PAD_UART1_TX_DATA__UART1_DCE_TX |MUX_PAD_CTRL (UART_PAD_CTRL ), -MX6_PAD_UART1_RX_DATA__UART1_DCE_RX |MUX_PAD_CTRL (UART_PAD_CTRL ), -}; - -int board_early_init_f (void ) -{ -imx_iomux_v3_setup_multiple_pads (uart1_pads,ARRAY_SIZE (uart1_pads)); - -return 0 ; -} -#ifdef CONFIG_NAND_MXS #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
@@ -185,6 +169,15 @@ int dram_init(void)#include <asm/arch/crm_regs.h> #include <asm/arch/mx6-ddr.h> +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart1_pads[] = { +MX6_PAD_UART1_TX_DATA__UART1_DCE_TX |MUX_PAD_CTRL (UART_PAD_CTRL ), +MX6_PAD_UART1_RX_DATA__UART1_DCE_RX |MUX_PAD_CTRL (UART_PAD_CTRL ), +}; +/* MMC board initialization is needed till adding DM support in SPL */ #if defined(CONFIG_FSL_ESDHC ) && !defined(CONFIG_DM_MMC )#include <mmc.h>
@@ -402,7 +395,7 @@ void board_init_f(ulong dummy)ccgr_init ();/* iomux and setup of i2c */ -board_early_init_f (); +imx_iomux_v3_setup_multiple_pads (uart1_pads,ARRAY_SIZE (uart1_pads));/* setup GP timer */ timer_init ();
Signature · 1 line
1.9.1
PATCH 8/16 icorem6: Use proper iomux_ddr_regs drive strength values
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Usually the drive strength values for DQ and SDL are 0x30 and 0x28 respectively, update them accordingly.
--- board/engicam/icorem6/icorem6.c | 58 ++++++++++++++++----------------- board/engicam/icorem6_rqs/icorem6_rqs.c | 58 ++++++++++++++++----------------- 2 files changed, 58 insertions(+), 58 deletions(-)
board/engicam/icorem6/icorem6.c +29 -29
@@ -369,29 +369,29 @@ int board_fit_config_name_match(const char *name)/* configure MX6Q/DUAL mmdc DDR io registers */ static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = { - .dram_sdqs0 =0x28 , - .dram_sdqs1 =0x28 , - .dram_sdqs2 =0x28 , - .dram_sdqs3 =0x28 , - .dram_sdqs4 =0x28 , - .dram_sdqs5 =0x28 , - .dram_sdqs6 =0x28 , - .dram_sdqs7 =0x28 , - .dram_dqm0 =0x28 , - .dram_dqm1 =0x28 , - .dram_dqm2 =0x28 , - .dram_dqm3 =0x28 , - .dram_dqm4 =0x28 , - .dram_dqm5 =0x28 , - .dram_dqm6 =0x28 , - .dram_dqm7 =0x28 , + .dram_sdqs0 =0x30 , + .dram_sdqs1 =0x30 , + .dram_sdqs2 =0x30 , + .dram_sdqs3 =0x30 , + .dram_sdqs4 =0x30 , + .dram_sdqs5 =0x30 , + .dram_sdqs6 =0x30 , + .dram_sdqs7 =0x30 , + .dram_dqm0 =0x30 , + .dram_dqm1 =0x30 , + .dram_dqm2 =0x30 , + .dram_dqm3 =0x30 , + .dram_dqm4 =0x30 , + .dram_dqm5 =0x30 , + .dram_dqm6 =0x30 , + .dram_dqm7 =0x30 , .dram_cas =0x30 , .dram_ras =0x30 , .dram_sdclk_0 =0x30 , .dram_sdclk_1 =0x30 , .dram_reset =0x30 , - .dram_sdcke0 =0x3000 , - .dram_sdcke1 =0x3000 , + .dram_sdcke0 =0x30 , + .dram_sdcke1 =0x30 , .dram_sdba2 =0x00000000 , .dram_sdodt0 =0x30 , .dram_sdodt1 =0x30 ,
@@ -417,16 +417,16 @@ static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {/* configure MX6SOLO/DUALLITE mmdc DDR io registers */ struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = { - .dram_sdclk_0 =0x30 , - .dram_sdclk_1 =0x30 , - .dram_cas =0x30 , - .dram_ras =0x30 , - .dram_reset =0x30 , - .dram_sdcke0 =0x30 , - .dram_sdcke1 =0x30 , + .dram_sdclk_0 =0x28 , + .dram_sdclk_1 =0x28 , + .dram_cas =0x28 , + .dram_ras =0x28 , + .dram_reset =0x28 , + .dram_sdcke0 =0x28 , + .dram_sdcke1 =0x28 , .dram_sdba2 =0x00000000 , - .dram_sdodt0 =0x30 , - .dram_sdodt1 =0x30 , + .dram_sdodt0 =0x28 , + .dram_sdodt1 =0x28 , .dram_sdqs0 =0x28 , .dram_sdqs1 =0x28 , .dram_sdqs2 =0x28 ,
@@ -450,8 +450,8 @@ struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = { .grp_ddr_type = 0x000c0000, .grp_ddrmode_ctl = 0x00020000, .grp_ddrpke = 0x00000000, - .grp_addds = 0x30, - .grp_ctlds = 0x30, + .grp_addds = 0x28, + .grp_ctlds = 0x28, .grp_ddrmode = 0x00020000, .grp_b0ds = 0x28, .grp_b1ds = 0x28,
board/engicam/icorem6_rqs/icorem6_rqs.c +29 -29
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Signature · 1 line
1.9.1
PATCH 9/16 icorem6: Use drive strength macros
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Use driver strength macros instead of hex numbers.
- IMX6DQ_DRIVE_STRENGTH - 0x30
- IMX6SDL_DRIVE_STRENGTH - 0x28
--- board/engicam/icorem6/icorem6.c | 140 ++++++++++++++++---------------- board/engicam/icorem6_rqs/icorem6_rqs.c | 140 ++++++++++++++++---------------- 2 files changed, 140 insertions(+), 140 deletions(-)
board/engicam/icorem6/icorem6.c +70 -70
@@ -369,80 +369,80 @@ int board_fit_config_name_match(const char *name)/* configure MX6Q/DUAL mmdc DDR io registers */ static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = { - .dram_sdqs0 =0x30 , - .dram_sdqs1 =0x30 , - .dram_sdqs2 =0x30 , - .dram_sdqs3 =0x30 , - .dram_sdqs4 =0x30 , - .dram_sdqs5 =0x30 , - .dram_sdqs6 =0x30 , - .dram_sdqs7 =0x30 , - .dram_dqm0 =0x30 , - .dram_dqm1 =0x30 , - .dram_dqm2 =0x30 , - .dram_dqm3 =0x30 , - .dram_dqm4 =0x30 , - .dram_dqm5 =0x30 , - .dram_dqm6 =0x30 , - .dram_dqm7 =0x30 , - .dram_cas =0x30 , - .dram_ras =0x30 , - .dram_sdclk_0 =0x30 , - .dram_sdclk_1 =0x30 , - .dram_reset =0x30 , - .dram_sdcke0 =0x30 , - .dram_sdcke1 =0x30 , + .dram_sdqs0 =IMX6DQ_DRIVE_STRENGTH , + .dram_sdqs1 =IMX6DQ_DRIVE_STRENGTH , + .dram_sdqs2 =IMX6DQ_DRIVE_STRENGTH , + .dram_sdqs3 =IMX6DQ_DRIVE_STRENGTH , + .dram_sdqs4 =IMX6DQ_DRIVE_STRENGTH , + .dram_sdqs5 =IMX6DQ_DRIVE_STRENGTH , + .dram_sdqs6 =IMX6DQ_DRIVE_STRENGTH , + .dram_sdqs7 =IMX6DQ_DRIVE_STRENGTH , + .dram_dqm0 =IMX6DQ_DRIVE_STRENGTH , + .dram_dqm1 =IMX6DQ_DRIVE_STRENGTH , + .dram_dqm2 =IMX6DQ_DRIVE_STRENGTH , + .dram_dqm3 =IMX6DQ_DRIVE_STRENGTH , + .dram_dqm4 =IMX6DQ_DRIVE_STRENGTH , + .dram_dqm5 =IMX6DQ_DRIVE_STRENGTH , + .dram_dqm6 =IMX6DQ_DRIVE_STRENGTH , + .dram_dqm7 =IMX6DQ_DRIVE_STRENGTH , + .dram_cas =IMX6DQ_DRIVE_STRENGTH , + .dram_ras =IMX6DQ_DRIVE_STRENGTH , + .dram_sdclk_0 =IMX6DQ_DRIVE_STRENGTH , + .dram_sdclk_1 =IMX6DQ_DRIVE_STRENGTH , + .dram_reset =IMX6DQ_DRIVE_STRENGTH , + .dram_sdcke0 =IMX6DQ_DRIVE_STRENGTH , + .dram_sdcke1 =IMX6DQ_DRIVE_STRENGTH , .dram_sdba2 =0x00000000 , - .dram_sdodt0 =0x30 , - .dram_sdodt1 =0x30 , + .dram_sdodt0 =IMX6DQ_DRIVE_STRENGTH , + .dram_sdodt1 =IMX6DQ_DRIVE_STRENGTH , };/* configure MX6Q/DUAL mmdc GRP io registers */ static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = { - .grp_b0ds =0x30 , - .grp_b1ds =0x30 , - .grp_b2ds =0x30 , - .grp_b3ds =0x30 , - .grp_b4ds =0x30 , - .grp_b5ds =0x30 , - .grp_b6ds =0x30 , - .grp_b7ds =0x30 , - .grp_addds =0x30 , + .grp_b0ds =IMX6DQ_DRIVE_STRENGTH , + .grp_b1ds =IMX6DQ_DRIVE_STRENGTH , + .grp_b2ds =IMX6DQ_DRIVE_STRENGTH , + .grp_b3ds =IMX6DQ_DRIVE_STRENGTH , + .grp_b4ds =IMX6DQ_DRIVE_STRENGTH , + .grp_b5ds =IMX6DQ_DRIVE_STRENGTH , + .grp_b6ds =IMX6DQ_DRIVE_STRENGTH , + .grp_b7ds =IMX6DQ_DRIVE_STRENGTH , + .grp_addds =IMX6DQ_DRIVE_STRENGTH , .grp_ddrmode_ctl =0x00020000 , .grp_ddrpke =0x00000000 , .grp_ddrmode =0x00020000 , - .grp_ctlds =0x30 , + .grp_ctlds =IMX6DQ_DRIVE_STRENGTH , .grp_ddr_type =0x000c0000 , };/* configure MX6SOLO/DUALLITE mmdc DDR io registers */ struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = { - .dram_sdclk_0 =0x28 , - .dram_sdclk_1 =0x28 , - .dram_cas =0x28 , - .dram_ras =0x28 , - .dram_reset =0x28 , - .dram_sdcke0 =0x28 , - .dram_sdcke1 =0x28 , + .dram_sdclk_0 =IMX6SDL_DRIVE_STRENGTH , + .dram_sdclk_1 =IMX6SDL_DRIVE_STRENGTH , + .dram_cas =IMX6SDL_DRIVE_STRENGTH , + .dram_ras =IMX6SDL_DRIVE_STRENGTH , + .dram_reset =IMX6SDL_DRIVE_STRENGTH , + .dram_sdcke0 =IMX6SDL_DRIVE_STRENGTH , + .dram_sdcke1 =IMX6SDL_DRIVE_STRENGTH , .dram_sdba2 =0x00000000 , - .dram_sdodt0 =0x28 , - .dram_sdodt1 =0x28 , - .dram_sdqs0 =0x28 , - .dram_sdqs1 =0x28 , - .dram_sdqs2 =0x28 , - .dram_sdqs3 =0x28 , - .dram_sdqs4 =0x28 , - .dram_sdqs5 =0x28 , - .dram_sdqs6 =0x28 , - .dram_sdqs7 =0x28 , - .dram_dqm0 =0x28 , - .dram_dqm1 =0x28 , - .dram_dqm2 =0x28 , - .dram_dqm3 =0x28 , - .dram_dqm4 =0x28 , - .dram_dqm5 =0x28 , - .dram_dqm6 =0x28 , - .dram_dqm7 =0x28 , + .dram_sdodt0 =IMX6SDL_DRIVE_STRENGTH , + .dram_sdodt1 =IMX6SDL_DRIVE_STRENGTH , + .dram_sdqs0 =IMX6SDL_DRIVE_STRENGTH , + .dram_sdqs1 =IMX6SDL_DRIVE_STRENGTH , + .dram_sdqs2 =IMX6SDL_DRIVE_STRENGTH , + .dram_sdqs3 =IMX6SDL_DRIVE_STRENGTH , + .dram_sdqs4 =IMX6SDL_DRIVE_STRENGTH , + .dram_sdqs5 =IMX6SDL_DRIVE_STRENGTH , + .dram_sdqs6 =IMX6SDL_DRIVE_STRENGTH , + .dram_sdqs7 =IMX6SDL_DRIVE_STRENGTH , + .dram_dqm0 =IMX6SDL_DRIVE_STRENGTH , + .dram_dqm1 =IMX6SDL_DRIVE_STRENGTH , + .dram_dqm2 =IMX6SDL_DRIVE_STRENGTH , + .dram_dqm3 =IMX6SDL_DRIVE_STRENGTH , + .dram_dqm4 =IMX6SDL_DRIVE_STRENGTH , + .dram_dqm5 =IMX6SDL_DRIVE_STRENGTH , + .dram_dqm6 =IMX6SDL_DRIVE_STRENGTH , + .dram_dqm7 =IMX6SDL_DRIVE_STRENGTH , };/* configure MX6SOLO/DUALLITE mmdc GRP io registers */
@@ -450,17 +450,17 @@ struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = { .grp_ddr_type = 0x000c0000, .grp_ddrmode_ctl = 0x00020000, .grp_ddrpke = 0x00000000, - .grp_addds = 0x28, - .grp_ctlds = 0x28, + .grp_addds = IMX6SDL_DRIVE_STRENGTH, + .grp_ctlds = IMX6SDL_DRIVE_STRENGTH, .grp_ddrmode = 0x00020000, - .grp_b0ds = 0x28, - .grp_b1ds = 0x28, - .grp_b2ds = 0x28, - .grp_b3ds = 0x28, - .grp_b4ds = 0x28, - .grp_b5ds = 0x28, - .grp_b6ds = 0x28, - .grp_b7ds = 0x28, + .grp_b0ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b1ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b2ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b3ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b4ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b5ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b6ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b7ds = IMX6SDL_DRIVE_STRENGTH, };/* mt41j256 */
board/engicam/icorem6_rqs/icorem6_rqs.c +70 -70
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1.9.1
PATCH 10/16 i.MX6UL: geam6ul: Add SETUP_IOMUX_PADS
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add generic SETUP_IOMUX_PADS function, for imx6ul mux pads.
--- arch/arm/include/asm/imx-common/iomux-v3.h | 6 +++ board/engicam/geam6ul/geam6ul.c | 59 +++++++++++++++--------------- 2 files changed, 35 insertions(+), 30 deletions(-)
arch/arm/include/asm/imx-common/iomux-v3.h +6 -0
@@ -253,6 +253,12 @@ if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) { \ imx_iomux_v3_setup_pad(MX6Q_##def);#define SETUP_IOMUX_PADS (x) \ imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)) +#elif defined(CONFIG_MX6UL ) +#define IOMUX_PADS (x) MX6_##x +#define SETUP_IOMUX_PAD (def) \ + imx_iomux_v3_setup_pad(MX6_##def); +#define SETUP_IOMUX_PADS (x) \ + imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x))#else #define IOMUX_PADS (x) MX6DL_##x#define SETUP_IOMUX_PAD (def) \
board/engicam/geam6ul/geam6ul.c +29 -30
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1.9.1
PATCH 11/16 isiot: Fix to use usdhc2_pads for mmc2
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
mmc2 in Is.IoT using usdhc1_pads instead usdhc2_pads, so update the same.
--- board/engicam/isiotmx6ul/isiotmx6ul.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
board/engicam/isiotmx6ul/isiotmx6ul.c +1 -1
@@ -260,7 +260,7 @@ int board_mmc_init(bd_t *bis)break ;case 1 :imx_iomux_v3_setup_multiple_pads ( - usdhc1_pads,ARRAY_SIZE (usdhc2_pads)); + usdhc2_pads,ARRAY_SIZE (usdhc2_pads));gpio_direction_input (USDHC2_CD_GPIO ); usdhc_cfg[i].sdhc_clk =mxc_get_clock (MXC_ESDHC2_CLK );break ;
Signature · 1 line
1.9.1
PATCH 12/16 i.MX6UL: isiot: Add SETUP_IOMUX_PADS
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add generic SETUP_IOMUX_PADS function, for imx6ul mux pads and use them in Is.IoT board.
--- board/engicam/isiotmx6ul/isiotmx6ul.c | 80 +++++++++++++++++------------------ 1 file changed, 39 insertions(+), 41 deletions(-)
board/engicam/isiotmx6ul/isiotmx6ul.c +39 -41
@@ -30,21 +30,21 @@ DECLARE_GLOBAL_DATA_PTR;#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1)static iomux_v3_cfg_t const nand_pads[] = { -MX6_PAD_NAND_DATA00__RAWNAND_DATA00 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_DATA01__RAWNAND_DATA01 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_DATA02__RAWNAND_DATA02 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_DATA03__RAWNAND_DATA03 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_DATA04__RAWNAND_DATA04 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_DATA05__RAWNAND_DATA05 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_DATA06__RAWNAND_DATA06 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_DATA07__RAWNAND_DATA07 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_CLE__RAWNAND_CLE |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_ALE__RAWNAND_ALE |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_CE0_B__RAWNAND_CE0_B |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_RE_B__RAWNAND_RE_B |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_WE_B__RAWNAND_WE_B |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_WP_B__RAWNAND_WP_B |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), -MX6_PAD_NAND_READY_B__RAWNAND_READY_B |MUX_PAD_CTRL (GPMI_PAD_CTRL2 ), +IOMUX_PADS (PAD_NAND_DATA00__RAWNAND_DATA00 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_DATA01__RAWNAND_DATA01 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_DATA02__RAWNAND_DATA02 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_DATA03__RAWNAND_DATA03 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_DATA04__RAWNAND_DATA04 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_DATA05__RAWNAND_DATA05 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_DATA06__RAWNAND_DATA06 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_DATA07__RAWNAND_DATA07 |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_CLE__RAWNAND_CLE |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_ALE__RAWNAND_ALE |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_CE0_B__RAWNAND_CE0_B |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_RE_B__RAWNAND_RE_B |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_WE_B__RAWNAND_WE_B |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_WP_B__RAWNAND_WP_B |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), +IOMUX_PADS (PAD_NAND_READY_B__RAWNAND_READY_B |MUX_PAD_CTRL (GPMI_PAD_CTRL2 )), };static void setup_gpmi_nand (void )
@@ -52,7 +52,7 @@ static void setup_gpmi_nand(void)struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR ;/* config gpmi nand iomux */ -imx_iomux_v3_setup_multiple_pads (nand_pads,ARRAY_SIZE (nand_pads)); +SETUP_IOMUX_PADS (nand_pads); clrbits_le32(&mxc_ccm->CCGR4, MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK |
@@ -174,8 +174,8 @@ int dram_init(void) PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)static iomux_v3_cfg_t const uart1_pads[] = { -MX6_PAD_UART1_TX_DATA__UART1_DCE_TX |MUX_PAD_CTRL (UART_PAD_CTRL ), -MX6_PAD_UART1_RX_DATA__UART1_DCE_RX |MUX_PAD_CTRL (UART_PAD_CTRL ), +IOMUX_PADS (PAD_UART1_TX_DATA__UART1_DCE_TX |MUX_PAD_CTRL (UART_PAD_CTRL )), +IOMUX_PADS (PAD_UART1_RX_DATA__UART1_DCE_RX |MUX_PAD_CTRL (UART_PAD_CTRL )), };/* MMC board initialization is needed till adding DM support in SPL */
@@ -188,31 +188,31 @@ static iomux_v3_cfg_t const uart1_pads[] = { PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)static iomux_v3_cfg_t const usdhc1_pads[] = { -MX6_PAD_SD1_CLK__USDHC1_CLK |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_SD1_CMD__USDHC1_CMD |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_SD1_DATA0__USDHC1_DATA0 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_SD1_DATA1__USDHC1_DATA1 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_SD1_DATA2__USDHC1_DATA2 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_SD1_DATA3__USDHC1_DATA3 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +IOMUX_PADS (PAD_SD1_CLK__USDHC1_CLK |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_SD1_CMD__USDHC1_CMD |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_SD1_DATA0__USDHC1_DATA0 |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_SD1_DATA1__USDHC1_DATA1 |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_SD1_DATA2__USDHC1_DATA2 |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_SD1_DATA3__USDHC1_DATA3 |MUX_PAD_CTRL (USDHC_PAD_CTRL )),/* VSELECT */ -MX6_PAD_GPIO1_IO05__USDHC1_VSELECT |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +IOMUX_PADS (PAD_GPIO1_IO05__USDHC1_VSELECT |MUX_PAD_CTRL (USDHC_PAD_CTRL )),/* CD */ -MX6_PAD_UART1_RTS_B__GPIO1_IO19 |MUX_PAD_CTRL (NO_PAD_CTRL ), +IOMUX_PADS (PAD_UART1_RTS_B__GPIO1_IO19 |MUX_PAD_CTRL (NO_PAD_CTRL )),/* RST_B */ -MX6_PAD_GPIO1_IO09__GPIO1_IO09 |MUX_PAD_CTRL (NO_PAD_CTRL ), +IOMUX_PADS (PAD_GPIO1_IO09__GPIO1_IO09 |MUX_PAD_CTRL (NO_PAD_CTRL )), };static iomux_v3_cfg_t const usdhc2_pads[] = { -MX6_PAD_NAND_ALE__USDHC2_RESET_B |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_NAND_RE_B__USDHC2_CLK |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_NAND_WE_B__USDHC2_CMD |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_NAND_DATA00__USDHC2_DATA0 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_NAND_DATA01__USDHC2_DATA1 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_NAND_DATA02__USDHC2_DATA2 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_NAND_DATA03__USDHC2_DATA3 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_NAND_DATA04__USDHC2_DATA4 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), -MX6_PAD_NAND_DATA05__USDHC2_DATA5 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +IOMUX_PADS (PAD_NAND_ALE__USDHC2_RESET_B |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_NAND_RE_B__USDHC2_CLK |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_NAND_WE_B__USDHC2_CMD |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_NAND_DATA00__USDHC2_DATA0 |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_NAND_DATA01__USDHC2_DATA1 |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_NAND_DATA02__USDHC2_DATA2 |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_NAND_DATA03__USDHC2_DATA3 |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_NAND_DATA04__USDHC2_DATA4 |MUX_PAD_CTRL (USDHC_PAD_CTRL )), +IOMUX_PADS (PAD_NAND_DATA05__USDHC2_DATA5 |MUX_PAD_CTRL (USDHC_PAD_CTRL )), };#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19)
@@ -253,14 +253,12 @@ int board_mmc_init(bd_t *bis)for (i =0 ; i <CONFIG_SYS_FSL_USDHC_NUM ; i++) {switch (i) {case 0 : -imx_iomux_v3_setup_multiple_pads ( - usdhc1_pads,ARRAY_SIZE (usdhc1_pads)); +SETUP_IOMUX_PADS (usdhc1_pads);gpio_direction_input (USDHC1_CD_GPIO ); usdhc_cfg[i].sdhc_clk =mxc_get_clock (MXC_ESDHC_CLK );break ;case 1 : -imx_iomux_v3_setup_multiple_pads ( - usdhc2_pads,ARRAY_SIZE (usdhc2_pads)); +SETUP_IOMUX_PADS (usdhc2_pads);gpio_direction_input (USDHC2_CD_GPIO ); usdhc_cfg[i].sdhc_clk =mxc_get_clock (MXC_ESDHC2_CLK );break ;
@@ -395,7 +393,7 @@ void board_init_f(ulong dummy)ccgr_init ();/* iomux and setup of i2c */ -imx_iomux_v3_setup_multiple_pads (uart1_pads,ARRAY_SIZE (uart1_pads)); +SETUP_IOMUX_PADS (uart1_pads);/* setup GP timer */ timer_init ();
Signature · 1 line
1.9.1
PATCH 13/16 icorem6[_rqs]: Move the spl code common
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
SPL code for icorem6 and icorem6_rqs are same, so
move them in common area.
--- board/engicam/common/Makefile | 8 + board/engicam/common/spl.c | 304 ++++++++++++++++++++++++++++++++ board/engicam/icorem6/icorem6.c | 287 +----------------------------- board/engicam/icorem6_rqs/icorem6_rqs.c | 285 +----------------------------- 4 files changed, 314 insertions(+), 570 deletions(-) create mode 100644 board/engicam/common/Makefile create mode 100644 board/engicam/common/spl.c
board/engicam/common/Makefile new file +8 -0
@@ -0,0 +1,8 @@ +# Copyright (C) 2016 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifdef CONFIG_MX6QDL +obj-$(CONFIG_SPL_BUILD) += spl.o +endif
board/engicam/common/spl.c new file +304 -0
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board/engicam/icorem6/icorem6.c +1 -286
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board/engicam/icorem6_rqs/icorem6_rqs.c +1 -284
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1.9.1
PATCH 14/16 geam6/isiot: Move the spl code common
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
SPL code for geam6 and isiot are same, so move them in common area.
--- board/engicam/common/Makefile | 2 - board/engicam/common/spl.c | 93 +++++++++++++++++++++++++- board/engicam/geam6ul/geam6ul.c | 122 ---------------------------------- board/engicam/isiotmx6ul/isiotmx6ul.c | 119 --------------------------------- 4 files changed, 91 insertions(+), 245 deletions(-)
board/engicam/common/Makefile +0 -2
@@ -3,6 +3,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -ifdef CONFIG_MX6QDL obj-$(CONFIG_SPL_BUILD) += spl.o -endif
board/engicam/common/spl.c +91 -2
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board/engicam/geam6ul/geam6ul.c +0 -122
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board/engicam/isiotmx6ul/isiotmx6ul.c +0 -119
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Signature · 1 line
1.9.1
PATCH 15/16 engicam: common: Move common board code
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Move possible common board code into common area
from supported boards.
--- board/engicam/common/Makefile | 1 + board/engicam/common/board.c | 56 +++++++++++++++++++++++++++++++++ board/engicam/common/board.h | 12 +++++++ board/engicam/geam6ul/geam6ul.c | 41 ++---------------------- board/engicam/icorem6/icorem6.c | 47 +++------------------------ board/engicam/icorem6_rqs/icorem6_rqs.c | 33 ++----------------- board/engicam/isiotmx6ul/isiotmx6ul.c | 38 ++-------------------- 7 files changed, 81 insertions(+), 147 deletions(-) create mode 100644 board/engicam/common/board.c create mode 100644 board/engicam/common/board.h
board/engicam/common/Makefile +1 -0
@@ -3,4 +3,5 @@ # SPDX-License-Identifier: GPL-2.0+ # +obj-y := board.o obj-$(CONFIG_SPL_BUILD) += spl.o
board/engicam/common/board.c new file +56 -0
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board/engicam/common/board.h new file +12 -0
@@ -0,0 +1,12 @@ +/* +* Copyright (C) 2016 Amarula Solutions B.V. +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ +void mmc_late_init (void ); +void setup_gpmi_nand (void ); +void setup_display (void ); +#endif /* _BOARD_H_ */
board/engicam/geam6ul/geam6ul.c +3 -38
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board/engicam/icorem6/icorem6.c +4 -43
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board/engicam/icorem6_rqs/icorem6_rqs.c +2 -31
@@ -20,15 +20,9 @@#include <asm/arch/sys_proto.h> #include <asm/imx-common/iomux-v3.h> -DECLARE_GLOBAL_DATA_PTR ; - -int board_init (void ) -{ -/* Address of boot parameters */ - gd->bd->bi_boot_params =PHYS_SDRAM +0x100 ; +#include "../common/board.h" -return 0 ; -} +DECLARE_GLOBAL_DATA_PTR ;#ifdef CONFIG_ENV_IS_IN_MMC int board_mmc_get_env_dev (int devno)
@@ -36,22 +30,6 @@ int board_mmc_get_env_dev(int devno)/* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ return (devno == 3) ? 1 : 0; } - -static void mmc_late_init (void ) -{ -char cmd[32 ]; -char mmcblk[32 ]; -u32 dev_no =mmc_get_env_dev (); - -setenv_ulong ("mmcdev" , dev_no); - -/* Set mmcblk env */ -sprintf (mmcblk,"/dev/mmcblk%dp2 rootwait rw" , dev_no); -setenv ("mmcroot" , mmcblk); - -sprintf (cmd,"mmc dev %d" , dev_no); -run_command (cmd,0 ); -}#endif int board_late_init (void )
@@ -80,13 +58,6 @@ int board_late_init(void)return 0 ; } -int dram_init (void ) -{ - gd->ram_size =imx_ddr_size (); - -return 0 ; -} -#ifdef CONFIG_SPL_BUILD #include <spl.h>
board/engicam/isiotmx6ul/isiotmx6ul.c +3 -35
@@ -20,6 +20,8 @@#include <asm/arch/sys_proto.h> #include <asm/imx-common/iomux-v3.h> +#include "../common/board.h" +DECLARE_GLOBAL_DATA_PTR ;#ifdef CONFIG_NAND_MXS
@@ -47,7 +49,7 @@ static iomux_v3_cfg_t const nand_pads[] = { IOMUX_PADS(PAD_NAND_READY_B__RAWNAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), }; -static void setup_gpmi_nand (void ) +void setup_gpmi_nand (void ) {struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR ;
@@ -94,22 +96,6 @@ int board_mmc_get_env_dev(int devno)/* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ return (devno == 0) ? 0 : 1; } - -static void mmc_late_init (void ) -{ -char cmd[32 ]; -char mmcblk[32 ]; -u32 dev_no =mmc_get_env_dev (); - -setenv_ulong ("mmcdev" , dev_no); - -/* Set mmcblk env */ -sprintf (mmcblk,"/dev/mmcblk%dp2 rootwait rw" , dev_no); -setenv ("mmcroot" , mmcblk); - -sprintf (cmd,"mmc dev %d" , dev_no); -run_command (cmd,0 ); -}#endif int board_late_init (void )
@@ -144,24 +130,6 @@ int board_late_init(void)return 0 ; } -int board_init (void ) -{ -/* Address of boot parameters */ - gd->bd->bi_boot_params =PHYS_SDRAM +0x100 ; - -#ifdef CONFIG_NAND_MXS -setup_gpmi_nand (); -#endif -return 0 ; -} - -int dram_init (void ) -{ - gd->ram_size =imx_ddr_size (); - -return 0 ; -} -#ifdef CONFIG_SPL_BUILD #include <spl.h>
Signature · 1 line
1.9.1
PATCH 16/16 engicam: common: Move board_late_init
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Move board_late_init into common area from supported boards.
--- board/engicam/common/board.c | 28 +++++++++++++++++++++++++++- board/engicam/common/board.h | 2 +- board/engicam/geam6ul/geam6ul.c | 21 +-------------------- board/engicam/icorem6/icorem6.c | 21 +-------------------- board/engicam/icorem6_rqs/icorem6_rqs.c | 20 +------------------- board/engicam/isiotmx6ul/isiotmx6ul.c | 23 +---------------------- 6 files changed, 32 insertions(+), 83 deletions(-)
board/engicam/common/board.c +27 -1
@@ -15,7 +15,7 @@DECLARE_GLOBAL_DATA_PTR ;#ifdef CONFIG_ENV_IS_IN_MMC -void mmc_late_init (void ) +static void mmc_late_init (void ) {char cmd[32 ];char mmcblk[32 ];
@@ -32,6 +32,32 @@ void mmc_late_init(void) }#endif +int board_late_init (void ) +{ +switch ((imx6_src_get_boot_mode () &IMX6_BMODE_MASK ) >> +IMX6_BMODE_SHIFT ) { +case IMX6_BMODE_SD : +case IMX6_BMODE_ESD : +case IMX6_BMODE_MMC : +case IMX6_BMODE_EMMC : +#ifdef CONFIG_ENV_IS_IN_MMC +mmc_late_init (); +#endif +setenv ("modeboot" ,"mmcboot" ); +break ; +case IMX6_BMODE_NAND : +setenv ("modeboot" ,"nandboot" ); +break ; +default : +setenv ("modeboot" ,"" ); +break ; + } + +setenv_fdt_file (); + +return 0 ; +} +int board_init (void ) {/* Address of boot parameters */
board/engicam/common/board.h +1 -1
@@ -6,7 +6,7 @@#ifndef _BOARD_H_#define _BOARD_H_ -void mmc_late_init (void ); +void setenv_fdt_file (void );void setup_gpmi_nand (void );void setup_display (void );#endif /* _BOARD_H_ */
board/engicam/geam6ul/geam6ul.c +1 -20
@@ -90,29 +90,10 @@ void setup_gpmi_nand(void) }#endif /* CONFIG_NAND_MXS */ -int board_late_init (void ) +void setenv_fdt_file (void ) { -switch ((imx6_src_get_boot_mode () &IMX6_BMODE_MASK ) >> -IMX6_BMODE_SHIFT ) { -case IMX6_BMODE_SD : -case IMX6_BMODE_ESD : -#ifdef CONFIG_ENV_IS_IN_MMC -mmc_late_init (); -#endif -setenv ("modeboot" ,"mmcboot" ); -break ; -case IMX6_BMODE_NAND : -setenv ("modeboot" ,"nandboot" ); -break ; -default : -setenv ("modeboot" ,"" ); -break ; - } -if (is_mx6ul ())setenv ("fdt_file" ,"imx6ul-geam-kit.dtb" ); - -return 0 ; }#ifdef CONFIG_SPL_BUILD
board/engicam/icorem6/icorem6.c +1 -20
@@ -192,31 +192,12 @@ void setup_display(void) }#endif /* CONFIG_VIDEO_IPUV3 */ -int board_late_init (void ) +void setenv_fdt_file (void ) { -switch ((imx6_src_get_boot_mode () &IMX6_BMODE_MASK ) >> -IMX6_BMODE_SHIFT ) { -case IMX6_BMODE_SD : -case IMX6_BMODE_ESD : -#ifdef CONFIG_ENV_IS_IN_MMC -mmc_late_init (); -#endif -setenv ("modeboot" ,"mmcboot" ); -break ; -case IMX6_BMODE_NAND : -setenv ("modeboot" ,"nandboot" ); -break ; -default : -setenv ("modeboot" ,"" ); -break ; - } -if (is_mx6dq ())setenv ("fdt_file" ,"imx6q-icore.dtb" );else if (is_mx6dl () ||is_mx6solo ())setenv ("fdt_file" ,"imx6dl-icore.dtb" ); - -return 0 ; }#ifdef CONFIG_SPL_BUILD
board/engicam/icorem6_rqs/icorem6_rqs.c +1 -19
@@ -32,30 +32,12 @@ int board_mmc_get_env_dev(int devno) }#endif -int board_late_init (void ) +void setenv_fdt_file (void ) { -switch ((imx6_src_get_boot_mode () &IMX6_BMODE_MASK ) >> -IMX6_BMODE_SHIFT ) { -case IMX6_BMODE_SD : -case IMX6_BMODE_ESD : -case IMX6_BMODE_MMC : -case IMX6_BMODE_EMMC : -#ifdef CONFIG_ENV_IS_IN_MMC -mmc_late_init (); -#endif -setenv ("modeboot" ,"mmcboot" ); -break ; -default : -setenv ("modeboot" ,"" ); -break ; - } -if (is_mx6dq ())setenv ("fdt_file" ,"imx6q-icore-rqs.dtb" );else if (is_mx6dl () ||is_mx6solo ())setenv ("fdt_file" ,"imx6dl-icore-rqs.dtb" ); - -return 0 ; }#ifdef CONFIG_SPL_BUILD
board/engicam/isiotmx6ul/isiotmx6ul.c +1 -22
@@ -98,27 +98,8 @@ int board_mmc_get_env_dev(int devno) }#endif -int board_late_init (void ) +void setenv_fdt_file (void ) { -switch ((imx6_src_get_boot_mode () &IMX6_BMODE_MASK ) >> -IMX6_BMODE_SHIFT ) { -case IMX6_BMODE_SD : -case IMX6_BMODE_ESD : -case IMX6_BMODE_MMC : -case IMX6_BMODE_EMMC : -#ifdef CONFIG_ENV_IS_IN_MMC -mmc_late_init (); -#endif -setenv ("modeboot" ,"mmcboot" ); -break ; -case IMX6_BMODE_NAND : -setenv ("modeboot" ,"nandboot" ); -break ; -default : -setenv ("modeboot" ,"" ); -break ; - } -if (is_mx6ul ()) {#ifdef CONFIG_ENV_IS_IN_MMC setenv ("fdt_file" ,"imx6ul-isiot-emmc.dtb" );
@@ -126,8 +107,6 @@ int board_late_init(void)setenv ("fdt_file" ,"imx6ul-isiot-nand.dtb" );#endif } - -return 0 ; }#ifdef CONFIG_SPL_BUILD
Signature · 1 line
1.9.1
cover i.MX6: Engicam: Move common board code
In reply to Jagan TekiQuoted 10 lines · Jagan Teki
From: Jagan Teki <[email protected]>
Engicam boards have some common code, so move them as
(1) SPLboard_init_fand UART MUX init tocommon/spl.c
(2)board_init,dram_init,board_late_initandmmc_late_inittocommon/board.cThis series also add
board_fit_config_name_matchto make SPL to pick suitable fdt, so reduced few defconifg files.
Nice cleanup - no comment from my side.
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
Quoted 60 lines
thanks!
Jagan.Jagan Teki (16):
icorem6: Add modeboot env viaboard_late_init
icorem6: Addmmc_late_init
geam6ul: Add modeboot env viaboard_late_init
geam6ul: Addmmc_late_init
engicam: Setfdt_fileenv during run-time
icorem6: Make SPL to pick suitable fdt
engicam: Move uart mux init to SPL
icorem6: Use properiomux_ddr_regsdrive strength values
icorem6: Use drive strength macros
i.MX6UL: geam6ul: AddSETUP_IOMUX_PADS
isiot: Fix to useusdhc2_padsfor mmc2
i.MX6UL: isiot: AddSETUP_IOMUX_PADSicorem6[_rqs]: Move the spl code common geam6/isiot: Move the spl code common
engicam: common: Move common board code
engicam: common: Moveboard_late_initarch/arm/cpu/armv7/mx6/Kconfig | 6 + arch/arm/include/asm/imx-common/iomux-v3.h | 6 + board/engicam/common/Makefile | 7 + board/engicam/common/board.c | 82 +++++ board/engicam/common/board.h | 12 + board/engicam/common/spl.c | 393 +++++++++++++++++++++ board/engicam/geam6ul/geam6ul.c | 206 ++--------- board/engicam/icorem6/MAINTAINERS | 6 +- board/engicam/icorem6/icorem6.c | 330 +---------------- board/engicam/icorem6_rqs/MAINTAINERS | 3 +- board/engicam/icorem6_rqs/icorem6_rqs.c | 352 +----------------- board/engicam/isiotmx6ul/isiotmx6ul.c | 261 +++----------- configs/imx6dl_icore_mmc_defconfig | 44 --- configs/imx6dl_icore_nand_defconfig | 45 --- configs/imx6dl_icore_rqs_mmc_defconfig | 41 --- configs/imx6q_icore_nand_defconfig | 45 --- ...e_mmc_defconfig => imx6qdl_icore_mmc_defconfig} | 2 +- ...c_defconfig => imx6qdl_icore_rqs_mmc_defconfig} | 2 +- configs/imx6ul_geam_mmc_defconfig | 1 - configs/imx6ul_geam_nand_defconfig | 1 - configs/imx6ul_isiot_emmc_defconfig | 1 - configs/imx6ul_isiot_mmc_defconfig | 1 - configs/imx6ul_isiot_nand_defconfig | 1 - include/configs/imx6qdl_icore.h | 39 +- include/configs/imx6qdl_icore_rqs.h | 1 - include/configs/imx6ul_geam.h | 38 +- include/configs/imx6ul_isiot.h | 1 - 27 files changed, 655 insertions(+), 1272 deletions(-) create mode 100644 board/engicam/common/Makefile create mode 100644 board/engicam/common/board.c create mode 100644 board/engicam/common/board.h create mode 100644 board/engicam/common/spl.c delete mode 100644 configs/imx6dl_icore_mmc_defconfig delete mode 100644 configs/imx6dl_icore_nand_defconfig delete mode 100644 configs/imx6dl_icore_rqs_mmc_defconfig delete mode 100644 configs/imx6q_icore_nand_defconfig rename configs/{imx6q_icore_mmc_defconfig => imx6qdl_icore_mmc_defconfig} (96%) rename configs/{imx6q_icore_rqs_mmc_defconfig => imx6qdl_icore_rqs_mmc_defconfig} (95%)
Signature · 5 lines
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