Skip to contentSkip to conversation

Patch "drm/amdgpu: Fix overflow of watermark calcs at > 4k resolutions." has been added to the 4.9-stable tree

PATCH [email protected] 1 participant 1 message Jun 18, 2017

Subsystems (3)
lore
Share & tools
lore

[email protected]

author maintainer Applied
#0 lore raw

This is a note to let you know that I've just added the patch titled

drm/amdgpu: Fix overflow of watermark calcs at > 4k resolutions.

to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
drm-amdgpu-fix-overflow-of-watermark-calcs-at-4k-resolutions.patch
and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From bea10413934dcf98cb9b2dfcdc56e1d28f192897 Mon Sep 17 00:00:00 2001

From: Mario Kleiner <[email protected]>
Date: Tue, 13 Jun 2017 07:17:10 +0200
Subject: drm/amdgpu: Fix overflow of watermark calcs at > 4k resolutions.

From: Mario Kleiner <[email protected]>

commit bea10413934dcf98cb9b2dfcdc56e1d28f192897 upstream.

Commit d63c277dc672e0
("drm/amdgpu: Make display watermark calculations more accurate") made watermark calculations more accurate, but not for > 4k resolutions on 32-Bit architectures, as it introduced an integer overflow for those setups and resolutions.

Fix this by proper u64 casting and division.

Fixes d63c277dc672 ("drm/amdgpu: Make display watermark calculations more accurate")
Cc Ben Hutchings <[email protected]>
Cc Alex Deucher <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c |    7 +++++--
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c |    7 +++++--
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c  |    7 +++++--
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c  |    7 +++++--
 4 files changed, 20 insertions(+), 8 deletions(-)
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +5 -2
@@ -1290,8 +1290,11 @@ static void dce_v10_0_program_watermarks
 	u32 tmp, wm_mask, lb_vblank_lead_lines = 0;
 
 	if (amdgpu_crtc->base.enabled && num_heads && mode) {
-		active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
-		line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
+		active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
+					    (u32)mode->clock);
+		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
+					  (u32)mode->clock);
+		line_time = min(line_time, (u32)65535);
 
 		/* watermark for high clocks */
 		if (adev->pm.dpm_enabled) {
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +5 -2
@@ -1257,8 +1257,11 @@ static void dce_v11_0_program_watermarks
 	u32 tmp, wm_mask, lb_vblank_lead_lines = 0;
 
 	if (amdgpu_crtc->base.enabled && num_heads && mode) {
-		active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
-		line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
+		active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
+					    (u32)mode->clock);
+		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
+					  (u32)mode->clock);
+		line_time = min(line_time, (u32)65535);
 
 		/* watermark for high clocks */
 		if (adev->pm.dpm_enabled) {
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c +5 -2
@@ -1054,8 +1054,11 @@ static void dce_v6_0_program_watermarks(
 	fixed20_12 a, b, c;
 
 	if (amdgpu_crtc->base.enabled && num_heads && mode) {
-		active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
-		line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
+		active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
+					    (u32)mode->clock);
+		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
+					  (u32)mode->clock);
+		line_time = min(line_time, (u32)65535);
 		priority_a_cnt = 0;
 		priority_b_cnt = 0;
 
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c +5 -2
@@ -1211,8 +1211,11 @@ static void dce_v8_0_program_watermarks(
 	u32 tmp, wm_mask, lb_vblank_lead_lines = 0;
 
 	if (amdgpu_crtc->base.enabled && num_heads && mode) {
-		active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
-		line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
+		active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
+					    (u32)mode->clock);
+		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
+					  (u32)mode->clock);
+		line_time = min(line_time, (u32)65535);
 
 		/* watermark for high clocks */
 		if (adev->pm.dpm_enabled) {

Patches currently in stable-queue which might be from [email protected] are

queue-4.9/drm-amdgpu-fix-overflow-of-watermark-calcs-at-4k-resolutions.patch