Patch "ASoC: tlv320aic3x: Mark the RESET register as volatile" has been added to the 4.9-stable tree

This is a note to let you know that I've just added the patch titled

ASoC: tlv320aic3x: Mark the RESET register as volatile

to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
asoc-tlv320aic3x-mark-the-reset-register-as-volatile.patch
and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Peter Ujfalusi <[email protected]>
Date: Fri, 23 Dec 2016 11:21:10 +0200
Subject: ASoC: tlv320aic3x: Mark the RESET register as volatile

From: Peter Ujfalusi <[email protected]>

[ Upstream commit 63c3194b82530bd71fd49db84eb7ab656b8d404a ]

The RESET register only have one self clearing bit and it should not be cached. If it is cached, when we sync the registers back to the chip we will initiate a software reset as well, which is not desirable.

---
 sound/soc/codecs/tlv320aic3x.c |   13 +++++++++++++
 1 file changed, 13 insertions(+)

@@ -126,6 +126,16 @@ static const struct reg_default aic3x_re
 	{ 108, 0x00 }, { 109, 0x00 },
 };
 
+static bool aic3x_volatile_reg(struct device *dev, unsigned int reg)
+{
+	switch (reg) {
+	case AIC3X_RESET:
+		return true;
+	default:
+		return false;
+	}
+}
+
 static const struct regmap_config aic3x_regmap = {
 	.reg_bits = 8,
 	.val_bits = 8,

@@ -133,6 +143,9 @@ static const struct regmap_config aic3x_
 	.max_register = DAC_ICC_ADJ,
 	.reg_defaults = aic3x_reg,
 	.num_reg_defaults = ARRAY_SIZE(aic3x_reg),
+
+	.volatile_reg = aic3x_volatile_reg,
+
 	.cache_type = REGCACHE_RBTREE,
 };
 

Patches currently in stable-queue which might be from [email protected] are

queue-4.9/asoc-tlv320aic3x-mark-the-reset-register-as-volatile.patch