Patch "ASoC: rt5645: set sel_i2s_pre_div1 to 2" has been added to the 4.9-stable tree

This is a note to let you know that I've just added the patch titled

    ASoC: rt5645: set sel_i2s_pre_div1 to 2

to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:

     asoc-rt5645-set-sel_i2s_pre_div1-to-2.patch

and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Bard Liao <[email protected]>
Date: Tue, 27 Dec 2016 12:05:05 +0800
Subject: ASoC: rt5645: set sel_i2s_pre_div1 to 2

From: Bard Liao <[email protected]>

[ Upstream commit 02c5c03283c52157d336abf5e44ffcda10579fbf ]

The i2s clock pre-divider 1 is used for both i2s1 and sysclk. The i2s1 is usually used for the main i2s and the pre-divider will be set in hw_params function.

However, if i2s2 is used, the pre-divider is not set in the hw_params function and the default value of i2s clock pre-divider 1 is too high for sysclk and DMIC usage. Fix by overriding default divider value to 2.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=95681

---
 sound/soc/codecs/rt5645.c |    3 +++
 1 file changed, 3 insertions(+)

@@ -3833,6 +3833,9 @@ static int rt5645_i2c_probe(struct i2c_c
 		}
 	}
 
+	regmap_update_bits(rt5645->regmap, RT5645_ADDA_CLK1,
+		RT5645_I2S_PD1_MASK, RT5645_I2S_PD1_2);
+
 	if (rt5645->pdata.jd_invert) {
 		regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
 			RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);

Patches currently in stable-queue which might be from [email protected] are

queue-4.9/asoc-rt5645-set-sel_i2s_pre_div1-to-2.patch