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armv8: ls1088a: Add NXP LS1088A SoC support

PATCH New Ashish Kumar 2 participants 7 messages Aug 31, 2017 – Sep 13, 2017

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Ashish Kumar

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PATCH v5 1/3 armv8: ls1088a: Add NXP LS1088A SoC support

The QorIQ LS1088A processor is built on the Layerscape architecture combining eight ARM A53 processor cores with advanced, high-performance datapath acceleration and networks, peripheral interfaces required for networking, wireless infrastructure, and general-purpose embedded applications.

LS1088A is compliant with the Layerscape Chassis Generation 3.

Features summary:
- Eight 32-bit / 64-bit ARM v8 Cortex-A53 CPUs
- Cores are in 2 cluster of 4-cores each
- Cache coherent interconnect (CCI-400)
- One 64-bit DDR4 SDRAM memory controller with ECC
- Data path acceleration architecture 2.0 (DPAA2)
- Ethernet interfaces: SGMIIs, RGMIIs, QSGMIIs, XFIs
- QSPI, IFC, 3 PCIe, 1 SATA, 2 USB, 1 SDXC, 2 DUARTs etc

Signed-off-by Alison Wang <[email protected]>
Signed-off-by Prabhakar Kushwaha <[email protected]>
Signed-off-by Ashish Kumar <[email protected]>
Signed-off-by Raghav Dogra <[email protected]>
Signed-off-by Shaohui Xie <[email protected]>

---

v5:
No change

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig          |  35 +++++-
 arch/arm/cpu/armv8/fsl-layerscape/Makefile         |   4 +
 arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc   |  43 ++++++-
 .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c    |  19 ++++
 arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c | 126 +++++++++++++++++++++
 arch/arm/cpu/armv8/fsl-layerscape/soc.c            |   1 +
 arch/arm/dts/fsl-ls1088a.dtsi                      |  78 +++++++++++++
 arch/arm/include/asm/arch-fsl-layerscape/config.h  |  62 +++++++++-
 arch/arm/include/asm/arch-fsl-layerscape/cpu.h     |   4 +
 .../include/asm/arch-fsl-layerscape/fsl_serdes.h   |   3 +-
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  11 ++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h     |   4 +
 .../asm/arch-fsl-layerscape/stream_id_lsch3.h      |  14 +++
 drivers/ddr/fsl/util.c                             |   2 +-
 drivers/net/ldpaa_eth/Makefile                     |   1 +
 drivers/net/ldpaa_eth/ls1088a.c                    |  87 ++++++++++++++
 16 files changed, 482 insertions(+), 12 deletions(-)
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c
 create mode 100644 arch/arm/dts/fsl-ls1088a.dtsi
 create mode 100644 drivers/net/ldpaa_eth/ls1088a.c
arch/arm/cpu/armv8/fsl-layerscape/Kconfig +31 -4
index eb8ccd1..aa2d0d1 100644
@@ -50,6 +50,29 @@ config ARCH_LS1046A
 	select BOARD_EARLY_INIT_F
 	imply SCSI
 
+config ARCH_LS1088A
+	bool
+	select ARMV8_SET_SMPEN
+	select FSL_LSCH3
+	select SYS_FSL_DDR
+	select SYS_FSL_DDR_LE
+	select SYS_FSL_DDR_VER_50
+	select SYS_FSL_ERRATUM_A009803
+	select SYS_FSL_ERRATUM_A009942
+	select SYS_FSL_ERRATUM_A010165
+	select SYS_FSL_ERRATUM_A008511
+	select SYS_FSL_ERRATUM_A008850
+	select SYS_FSL_HAS_CCI400
+	select SYS_FSL_HAS_DDR4
+	select SYS_FSL_HAS_SEC
+	select SYS_FSL_SEC_COMPAT_5
+	select SYS_FSL_SEC_LE
+	select SYS_FSL_SRDS_1
+	select SYS_FSL_SRDS_2
+	select FSL_TZASC_1
+	select ARCH_EARLY_INIT_R
+	select BOARD_EARLY_INIT_F
+
 config ARCH_LS2080A
 	bool
 	select ARMV8_SET_SMPEN

@@ -100,7 +123,7 @@ config FSL_LSCH3
 
 config FSL_MC_ENET
 	bool "Management Complex network"
-	depends on ARCH_LS2080A
+	depends on ARCH_LS2080A || ARCH_LS1088A
 	default y
 	select RESV_RAM
 	help

@@ -116,6 +139,7 @@ config FSL_PCIE_COMPAT
 	default "fsl,ls1043a-pcie" if ARCH_LS1043A
 	default "fsl,ls1046a-pcie" if ARCH_LS1046A
 	default "fsl,ls2080a-pcie" if ARCH_LS2080A
+	default "fsl,ls1088a-pcie" if ARCH_LS1088A
 	help
 	  This compatible is used to find pci controller node in Kernel DT
 	  to complete fixup.

@@ -230,6 +254,7 @@ config MAX_CPUS
 	default 4 if ARCH_LS1043A
 	default 4 if ARCH_LS1046A
 	default 16 if ARCH_LS2080A
+	default 8 if ARCH_LS1088A
 	default 1
 	help
 	  Set this number to the maximum number of possible CPUs in the SoC.

@@ -261,10 +286,10 @@ config SYS_CCI400_OFFSET
 
 config SYS_FSL_IFC_BANK_COUNT
 	int "Maximum banks of Integrated flash controller"
-	depends on ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
+	depends on ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A || ARCH_LS1088A
 	default 4 if ARCH_LS1043A
 	default 4 if ARCH_LS1046A
-	default 8 if ARCH_LS2080A
+	default 8 if ARCH_LS2080A || ARCH_LS1088A
 
 config SYS_FSL_HAS_CCI400
 	bool

@@ -313,6 +338,7 @@ config SYS_FSL_PCLK_DIV
 	int "Platform clock divider"
 	default 1 if ARCH_LS1043A
 	default 1 if ARCH_LS1046A
+	default 1 if ARCH_LS1088A
 	default 2
 	help
 	  This is the divider that is used to derive Platform clock from

@@ -406,7 +432,8 @@ config SYS_FSL_ERRATUM_A009929
 config SYS_MC_RSV_MEM_ALIGN
 	hex "Management Complex reserved memory alignment"
 	depends on RESV_RAM
-	default 0x20000000
+	default 0x20000000 if ARCH_LS2080A
+	default 0x70000000 if ARCH_LS1088A
 	help
 	  Reserved memory needs to be aligned for MC to use. Default value
 	  is 512MB.
arch/arm/cpu/armv8/fsl-layerscape/Makefile +4 -0
index e3ce018..115c3fc 100644
@@ -38,3 +38,7 @@ endif
 ifneq ($(CONFIG_ARCH_LS1046A),)
 obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o
 endif
+
+ifneq ($(CONFIG_ARCH_LS1088A),)
+obj-$(CONFIG_SYS_HAS_SERDES) += ls1088a_serdes.o
+endif
arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc +38 -5

55 lines not on this page · raw message

arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c +19 -0
index ef97556..179cac6 100644
@@ -28,6 +28,20 @@ __weak void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl)
 	return;
 }
 
+/*
+ *The return value of this func is the serdes protocol used.
+ *Typically this function is called number of times depending
+ *upon the number of serdes blocks in the Silicon.
+ *Zero is used to denote that no serdes was enabled,
+ *this is the case when golden RCW was used where DPAA2 bring was
+ *intentionally removed to achieve boot to prompt
+*/
+
+__weak int serdes_get_number(int serdes, int cfg)
+{
+	return cfg;
+}
+
 int is_serdes_configured(enum srds_prtcl device)
 {
 	int ret = 0;

@@ -73,6 +87,9 @@ int serdes_get_first_lane(u32 sd, enum srds_prtcl device)
 		printf("invalid SerDes%d\n", sd);
 		break;
 	}
+
+	cfg = serdes_get_number(sd, cfg);
+
 	/* Is serdes enabled at all? */
 	if (cfg == 0)
 		return -ENODEV;

@@ -99,6 +116,8 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask,
 
 	cfg = gur_in32(&gur->rcwsr[rcwsr - 1]) & sd_prctl_mask;
 	cfg >>= sd_prctl_shift;
+
+	cfg = serdes_get_number(sd, cfg);
 	printf("Using SERDES%d Protocol: %d (0x%x)\n", sd + 1, cfg, cfg);
 
 	if (!is_serdes_prtcl_valid(sd, cfg))
arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c new file +126 -0

126 lines not on this page · raw message

arch/arm/cpu/armv8/fsl-layerscape/soc.c +1 -0
index e13f183..83e2871 100644
@@ -24,6 +24,7 @@
 #ifdef CONFIG_CHAIN_OF_TRUST
 #include <fsl_validate.h>
 #endif
+#include <fsl_immap.h>
 
 DECLARE_GLOBAL_DATA_PTR;
arch/arm/dts/fsl-ls1088a.dtsi new file +78 -0

78 lines not on this page · raw message

arch/arm/include/asm/arch-fsl-layerscape/config.h +61 -1

74 lines not on this page · raw message

arch/arm/include/asm/arch-fsl-layerscape/cpu.h +4 -0
index c4e5ecc..0126783 100644
@@ -24,6 +24,10 @@ static struct cpu_type cpu_type_list[] = {
 	CPU_TYPE_ENTRY(LS1026A, LS1026A, 2),
 	CPU_TYPE_ENTRY(LS2040A, LS2040A, 4),
 	CPU_TYPE_ENTRY(LS1012A, LS1012A, 1),
+	CPU_TYPE_ENTRY(LS1088A, LS1088A, 8),
+	CPU_TYPE_ENTRY(LS1084A, LS1084A, 8),
+	CPU_TYPE_ENTRY(LS1048A, LS1048A, 4),
+	CPU_TYPE_ENTRY(LS1044A, LS1044A, 4),
 };
 
 #ifndef CONFIG_SYS_DCACHE_OFF
arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h +2 -1
index a8f9a50..a2c7578 100644
@@ -9,7 +9,7 @@
 
 #include <config.h>
 
-#ifdef CONFIG_ARCH_LS2080A
+#ifdef CONFIG_FSL_LSCH3
 enum srds_prtcl {
 	/*
 	 * Nobody will check whether the device 'NONE' has been configured,

@@ -158,6 +158,7 @@ void fsl_serdes_init(void);
 int serdes_get_first_lane(u32 sd, enum srds_prtcl device);
 enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane);
 int is_serdes_prtcl_valid(int serdes, u32 prtcl);
+int serdes_get_number(int serdes, int cfg);
 
 #ifdef CONFIG_FSL_LSCH2
 const char *serdes_clock_to_string(u32 clock);
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +11 -0
index 59410aa..99a7413 100644
@@ -246,6 +246,17 @@ struct ccsr_gur {
 #define FSL_CHASSIS3_SRDS2_PRTCL_SHIFT	FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT
 #define FSL_CHASSIS3_SRDS1_REGSR	29
 #define FSL_CHASSIS3_SRDS2_REGSR	29
+#elif defined(CONFIG_ARCH_LS1088A)
+#define	FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_MASK	0xFFFF0000
+#define	FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_SHIFT	16
+#define	FSL_CHASSIS3_RCWSR30_SRDS2_PRTCL_MASK	0x0000FFFF
+#define	FSL_CHASSIS3_RCWSR30_SRDS2_PRTCL_SHIFT	0
+#define FSL_CHASSIS3_SRDS1_PRTCL_MASK	FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_MASK
+#define FSL_CHASSIS3_SRDS1_PRTCL_SHIFT	FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_SHIFT
+#define FSL_CHASSIS3_SRDS2_PRTCL_MASK	FSL_CHASSIS3_RCWSR30_SRDS2_PRTCL_MASK
+#define FSL_CHASSIS3_SRDS2_PRTCL_SHIFT	FSL_CHASSIS3_RCWSR30_SRDS2_PRTCL_SHIFT
+#define FSL_CHASSIS3_SRDS1_REGSR	29
+#define FSL_CHASSIS3_SRDS2_REGSR	30
 #endif
 #define RCW_SB_EN_REG_INDEX	9
 #define RCW_SB_EN_MASK		0x00000400
arch/arm/include/asm/arch-fsl-layerscape/soc.h +4 -0
index aeb1273..ea8aced 100644
@@ -57,6 +57,10 @@ struct cpu_type {
 #define SVR_LS1023A		0x879208
 #define SVR_LS1046A		0x870700
 #define SVR_LS1026A		0x870708
+#define SVR_LS1048A		0x870320
+#define SVR_LS1084A		0x870302
+#define SVR_LS1088A		0x870300
+#define SVR_LS1044A		0x870322
 #define SVR_LS2045A		0x870120
 #define SVR_LS2080A		0x870110
 #define SVR_LS2085A		0x870100
arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h +14 -0
index d7d527d..d1891c4 100644
@@ -66,12 +66,26 @@
 #define FSL_USB2_STREAM_ID		2
 #define FSL_SDMMC_STREAM_ID		3
 #define FSL_SATA1_STREAM_ID		4
+
+#if defined(CONFIG_ARCH_LS2080A)
 #define FSL_SATA2_STREAM_ID		5
+#endif
+
+#if defined(CONFIG_ARCH_LS2080A)
 #define FSL_DMA_STREAM_ID		6
+#elif defined(CONFIG_ARCH_LS1088A)
+#define FSL_DMA_STREAM_ID		5
+#endif
 
 /* PCI - programmed in PEXn_LUT */
 #define FSL_PEX_STREAM_ID_START		7
+
+#if defined(CONFIG_ARCH_LS2080A)
 #define FSL_PEX_STREAM_ID_END		22
+#elif defined(CONFIG_ARCH_LS1088A)
+#define FSL_PEX_STREAM_ID_END		18
+#endif
+
 
 /* DPAA2 - set in MC DPC and alloced by MC */
 #define FSL_DPAA2_STREAM_ID_START	23
drivers/ddr/fsl/util.c +1 -1
index 0a305b3..d6e6e78 100644
@@ -390,7 +390,7 @@ void fsl_ddr_sync_memctl_refresh(unsigned int first_ctrl,
 
 void remove_unused_controllers(fsl_ddr_info_t *info)
 {
-#ifdef CONFIG_FSL_LSCH3
+#ifdef CONFIG_SYS_FSL_HAS_CCN504
 	int i;
 	u64 nodeid;
 	void *hnf_sam_ctrl = (void *)(CCI_HN_F_0_BASE + CCN_HN_F_SAM_CTL);
drivers/net/ldpaa_eth/Makefile +1 -0
index 08675ec..13ecd38 100644
@@ -7,3 +7,4 @@
 obj-y += ldpaa_wriop.o
 obj-y += ldpaa_eth.o
 obj-$(CONFIG_ARCH_LS2080A) += ls2080a.o
+obj-$(CONFIG_ARCH_LS1088A) += ls1088a.o
drivers/net/ldpaa_eth/ls1088a.c new file +87 -0

87 lines not on this page · raw message

Signature · 1 line
2.7.4
author
#1 lore raw

PATCH v5 2/3 armv8: ls1088ardb: Add support for LS1088ARDB platform

LS1088A is an ARMv8 implementation. The LS1088ARDB is an evaluatoin platform that supports the LS1088A family SoCs. This patch add basic support of the platform.

Signed-off-by Alison Wang <[email protected]>
Signed-off-by Prabhakar Kushwaha <[email protected]>
Signed-off-by Ashish Kumar <[email protected]>
Signed-off-by Raghav Dogra <[email protected]>
Signed-off-by Shaohui Xie <[email protected]>

---
v5:
Fix checkpatch's check
Change getenv() to env_get()
Rebase to top commit "8b3cec7 mtdparts: Fix uninitialized scalar usage"

 arch/arm/Kconfig                          |  14 ++
 arch/arm/cpu/armv8/Kconfig                |   1 +
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |   1 +
 arch/arm/dts/Makefile                     |   3 +-
 arch/arm/dts/fsl-ls1088a-rdb.dts          |  40 ++++
 board/freescale/ls1088a/Kconfig           |  15 ++
 board/freescale/ls1088a/MAINTAINERS       |   7 +
 board/freescale/ls1088a/Makefile          |   9 +
 board/freescale/ls1088a/README            |  66 ++++++
 board/freescale/ls1088a/ddr.c             | 102 +++++++++
 board/freescale/ls1088a/ddr.h             |  44 ++++
 board/freescale/ls1088a/eth_ls1088ardb.c  | 102 +++++++++
 board/freescale/ls1088a/ls1088a.c         | 332 ++++++++++++++++++++++++++++++
 board/freescale/ls1088a/ls1088a_qixis.h   |  34 +++
 configs/ls1088ardb_qspi_defconfig         |  29 +++
 include/configs/ls1088a_common.h          | 201 ++++++++++++++++++
 include/configs/ls1088ardb.h              | 319 ++++++++++++++++++++++++++++
 17 files changed, 1318 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/fsl-ls1088a-rdb.dts
 create mode 100644 board/freescale/ls1088a/Kconfig
 create mode 100644 board/freescale/ls1088a/MAINTAINERS
 create mode 100644 board/freescale/ls1088a/Makefile
 create mode 100644 board/freescale/ls1088a/README
 create mode 100644 board/freescale/ls1088a/ddr.c
 create mode 100644 board/freescale/ls1088a/ddr.h
 create mode 100644 board/freescale/ls1088a/eth_ls1088ardb.c
 create mode 100644 board/freescale/ls1088a/ls1088a.c
 create mode 100644 board/freescale/ls1088a/ls1088a_qixis.h
 create mode 100644 configs/ls1088ardb_qspi_defconfig
 create mode 100644 include/configs/ls1088a_common.h
 create mode 100644 include/configs/ls1088ardb.h
arch/arm/Kconfig +14 -0
index 53d0831..acc6990 100644
@@ -906,6 +906,19 @@ config TARGET_LS1012AFRDM
 	  development platform that supports the QorIQ LS1012A
 	  Layerscape Architecture processor.
 
+config TARGET_LS1088ARDB
+	bool "Support ls1088ardb"
+	select ARCH_LS1088A
+	select ARM64
+	select ARMV8_MULTIENTRY
+	select ARCH_MISC_INIT
+	select BOARD_LATE_INIT
+	help
+	  Support for NXP LS1088ARDB platform.
+	  The LS1088A Reference design board (RDB) is a high-performance
+	  development platform that supports the QorIQ LS1088A
+	  Layerscape Architecture processor.
+
 config TARGET_LS1021AQDS
 	bool "Support ls1021aqds"
 	select BOARD_LATE_INIT

@@ -1185,6 +1198,7 @@ source "board/creative/xfi3/Kconfig"
 source "board/freescale/ls2080a/Kconfig"
 source "board/freescale/ls2080aqds/Kconfig"
 source "board/freescale/ls2080ardb/Kconfig"
+source "board/freescale/ls1088a/Kconfig"
 source "board/freescale/ls1021aqds/Kconfig"
 source "board/freescale/ls1043aqds/Kconfig"
 source "board/freescale/ls1021atwr/Kconfig"
arch/arm/cpu/armv8/Kconfig +1 -0
index 8e4c3dd..aecdf81 100644
@@ -88,6 +88,7 @@ config PSCI_RESET
 	depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \
 		   !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
 		   !TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \
+		   !TARGET_LS1088ARDB && \
 		   !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
 		   !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \
 		   !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
arch/arm/cpu/armv8/fsl-layerscape/Kconfig +1 -0
index aa2d0d1..9290268 100644
@@ -208,6 +208,7 @@ config SYS_LS_PPA_FW_ADDR
 	default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A
 	default 0x40400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT
 	default 0x580400000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A
+	default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1088A
 	default 0x60400000 if SYS_LS_PPA_FW_IN_XIP
 	default 0x400000 if SYS_LS_PPA_FW_IN_MMC
 	default 0x400000 if SYS_LS_PPA_FW_IN_NAND
arch/arm/dts/Makefile +2 -1
index 762429c..9c63fb4 100644
@@ -187,7 +187,8 @@ dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \
 dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
 	fsl-ls2080a-rdb.dtb \
 	fsl-ls2081a-rdb.dtb \
-	fsl-ls2088a-rdb-qspi.dtb
+	fsl-ls2088a-rdb-qspi.dtb \
+	fsl-ls1088a-rdb.dtb
 dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
 	fsl-ls1043a-qds-lpuart.dtb \
 	fsl-ls1043a-rdb.dtb \
arch/arm/dts/fsl-ls1088a-rdb.dts new file +40 -0
new file mode 100644
index 0000000..30ceed8
@@ -0,0 +1,40 @@
+/*
+ * NXP ls1088a RDB board device tree source
+ *
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "fsl-ls1088a.dtsi"
+
+/ {
+	model = "NXP Layerscape 1088a RDB Board";
+	compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
+	aliases {
+		spi0 = &qspi;
+	};
+};
+
+&qspi {
+	bus-num = <0>;
+	status = "okay";
+
+	qflash0: s25fs512s at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-flash";
+		spi-max-frequency = <50000000>;
+		reg = <0>;
+	};
+
+	qflash1: s25fs512s at 1 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-flash";
+		spi-max-frequency = <50000000>;
+		reg = <1>;
+	 };
+};
board/freescale/ls1088a/Kconfig new file +15 -0
new file mode 100644
index 0000000..a4d8223
@@ -0,0 +1,15 @@
+if TARGET_LS1088ARDB
+
+config SYS_BOARD
+	default "ls1088a"
+
+config SYS_VENDOR
+	default "freescale"
+
+config SYS_SOC
+	default "fsl-layerscape"
+
+config SYS_CONFIG_NAME
+	default "ls1088ardb"
+
+endif
board/freescale/ls1088a/MAINTAINERS new file +7 -0
new file mode 100644
index 0000000..12834f6
@@ -0,0 +1,7 @@
+LS1088ARDB BOARD
+M:	Prabhakar Kushwaha <[email protected]>
+M:	Ashish Kumar <[email protected]>
+S:	Maintained
+F:	board/freescale/ls1088a/
+F:	include/configs/ls1088ardb.h
+F:	configs/ls1088ardb_qspi_defconfig
board/freescale/ls1088a/Makefile new file +9 -0
new file mode 100644
index 0000000..e997cf1
@@ -0,0 +1,9 @@
+#
+# Copyright 2017 NXP
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += ls1088a.o
+obj-$(CONFIG_TARGET_LS1088ARDB) += eth_ls1088ardb.o
+obj-y += ddr.o
board/freescale/ls1088a/README new file +66 -0

66 lines not on this page · raw message

board/freescale/ls1088a/ddr.c new file +102 -0

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board/freescale/ls1088a/ddr.h new file +44 -0

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board/freescale/ls1088a/eth_ls1088ardb.c new file +102 -0

102 lines not on this page · raw message

board/freescale/ls1088a/ls1088a.c new file +332 -0

332 lines not on this page · raw message

board/freescale/ls1088a/ls1088a_qixis.h new file +34 -0
new file mode 100644
index 0000000..9757d1b
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __LS1088AQDS_QIXIS_H__
+#define __LS1088AQDS_QIXIS_H__
+
+/* Definitions of QIXIS Registers for LS1088AQDS */
+
+/* SYSCLK */
+#define QIXIS_SYSCLK_66			0x0
+#define QIXIS_SYSCLK_83			0x1
+#define QIXIS_SYSCLK_100		0x2
+#define QIXIS_SYSCLK_125		0x3
+#define QIXIS_SYSCLK_133		0x4
+#define QIXIS_SYSCLK_150		0x5
+#define QIXIS_SYSCLK_160		0x6
+#define QIXIS_SYSCLK_166		0x7
+
+/* DDRCLK */
+#define QIXIS_DDRCLK_66			0x0
+#define QIXIS_DDRCLK_100		0x1
+#define QIXIS_DDRCLK_125		0x2
+#define QIXIS_DDRCLK_133		0x3
+
+/* BRDCFG2 - SD clock*/
+#define QIXIS_SDCLK1_100		0x0
+#define QIXIS_SDCLK1_125		0x1
+#define QIXIS_SDCLK1_165		0x2
+#define QIXIS_SDCLK1_100_SP		0x3
+
+#endif
configs/ls1088ardb_qspi_defconfig new file +29 -0
new file mode 100644
index 0000000..33e4124
@@ -0,0 +1,29 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1088ARDB=y
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT"
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_SYS_NS16550=y
+CONFIG_FSL_DSPI=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_FSL_LS_PPA=y
include/configs/ls1088a_common.h new file +201 -0

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include/configs/ls1088ardb.h new file +319 -0

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Signature · 1 line
2.7.4
#2 lore raw

PATCH v5 2/3 armv8: ls1088ardb: Add support for LS1088ARDB platform

Quoted 9 lines · Ashish Kumar

LS1088A is an ARMv8 implementation. The LS1088ARDB is an evaluatoin platform that supports the LS1088A family SoCs. This patch add basic support of the platform.

Signed-off-by Alison Wang <[email protected]>
Signed-off-by Prabhakar Kushwaha <[email protected]>
Signed-off-by Ashish Kumar <[email protected]>
Signed-off-by Raghav Dogra <[email protected]>
Signed-off-by Shaohui Xie <[email protected]>
Quoted 6 lines

---
v5:
Fix checkpatch's check
Change getenv() to env_get()
Rebase to top commit "8b3cec7 mtdparts: Fix uninitialized scalar usage"

Ashish,

I am seeing two issues. One is "fsl_ifc_read_byte beyond end of buffer". It comes from NAND driver. The other is CONFIG_ENV_IS_* is not defined. You cannot save env without it.

York

Applied
#3 lore raw

PATCH v5 2/3 armv8: ls1088ardb: Add support for LS1088ARDB platform

In reply to Ashish Kumar
Quoted 9 lines · Ashish Kumar

LS1088A is an ARMv8 implementation. The LS1088ARDB is an evaluatoin platform that supports the LS1088A family SoCs. This patch add basic support of the platform.

Signed-off-by Alison Wang <[email protected]>
Signed-off-by Prabhakar Kushwaha <[email protected]>
Signed-off-by Ashish Kumar <[email protected]>
Signed-off-by Raghav Dogra <[email protected]>
Signed-off-by Shaohui Xie <[email protected]>
Quoted 6 lines

---
v5:
Fix checkpatch's check
Change getenv() to env_get()
Rebase to top commit "8b3cec7 mtdparts: Fix uninitialized scalar usage"

Disabled NAND in header file. Please send a fix to re-enable it.

Applied to fsl-qoriq master. Thanks.

York

author
#4 lore raw

PATCH v5 3/3 armv8: ls1088aqds: Add support of LS1088AQDS

In reply to Ashish Kumar

This patch add support of LS1088AQDS platform.

The LS1088A QorIQTM Development System (QDS) is a high-performance computing, evaluation, and
development platform that supports the LS1088A QorIQ Architecture processor.

Signed-off-by Prabhakar Kushwaha <[email protected]>
Signed-off-by Shaohui Xie <[email protected]>
Signed-off-by Ashish Kumar <[email protected]>

---
v5:
Fix checkpatch's check
Change getenv() to env_get()
Rebase to top commit "8b3cec7 mtdparts: Fix uninitialized scalar usage"

 arch/arm/Kconfig                         |  13 +
 arch/arm/cpu/armv8/Kconfig               |   2 +-
 arch/arm/dts/Makefile                    |   3 +-
 arch/arm/dts/fsl-ls1088a-qds.dts         |  70 ++++
 board/freescale/ls1088a/Kconfig          |  16 +
 board/freescale/ls1088a/MAINTAINERS      |   8 +
 board/freescale/ls1088a/Makefile         |   1 +
 board/freescale/ls1088a/README           |  79 ++++
 board/freescale/ls1088a/ddr.h            |   5 +
 board/freescale/ls1088a/eth_ls1088aqds.c | 650 +++++++++++++++++++++++++++++++
 board/freescale/ls1088a/ls1088a.c        |  84 +++-
 board/freescale/ls1088a/ls1088a_qixis.h  |   5 +
 configs/ls1088aqds_qspi_defconfig        |  29 ++
 include/configs/ls1088aqds.h             | 414 ++++++++++++++++++++
 14 files changed, 1372 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/dts/fsl-ls1088a-qds.dts
 create mode 100644 board/freescale/ls1088a/eth_ls1088aqds.c
 create mode 100644 configs/ls1088aqds_qspi_defconfig
 create mode 100644 include/configs/ls1088aqds.h
arch/arm/Kconfig +13 -0
index acc6990..5cad0d3 100644
@@ -805,6 +805,19 @@ config TARGET_LS2080A_SIMU
 	  development platform that supports the QorIQ LS2080A
 	  Layerscape Architecture processor.
 
+config TARGET_LS1088AQDS
+	bool "Support ls1088aqds"
+	select ARCH_LS1088A
+	select ARM64
+	select ARMV8_MULTIENTRY
+	select ARCH_MISC_INIT
+	select BOARD_LATE_INIT
+	help
+	  Support for NXP LS1088AQDS platform
+	  The LS1088A Development System (QDS) is a high-performance
+	  development platform that supports the QorIQ LS1088A
+	  Layerscape Architecture processor.
+
 config TARGET_LS2080AQDS
 	bool "Support ls2080aqds"
 	select ARCH_LS2080A
arch/arm/cpu/armv8/Kconfig +1 -1
index aecdf81..12aba9d 100644
@@ -88,7 +88,7 @@ config PSCI_RESET
 	depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \
 		   !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
 		   !TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \
-		   !TARGET_LS1088ARDB && \
+		   !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \
 		   !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
 		   !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \
 		   !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
arch/arm/dts/Makefile +2 -1
index 9c63fb4..b070f98 100644
@@ -188,7 +188,8 @@ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
 	fsl-ls2080a-rdb.dtb \
 	fsl-ls2081a-rdb.dtb \
 	fsl-ls2088a-rdb-qspi.dtb \
-	fsl-ls1088a-rdb.dtb
+	fsl-ls1088a-rdb.dtb \
+	fsl-ls1088a-qds.dtb
 dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
 	fsl-ls1043a-qds-lpuart.dtb \
 	fsl-ls1043a-rdb.dtb \
arch/arm/dts/fsl-ls1088a-qds.dts new file +70 -0

70 lines not on this page · raw message

board/freescale/ls1088a/Kconfig +16 -0
index a4d8223..1ada661 100644
@@ -1,3 +1,19 @@
+if TARGET_LS1088AQDS
+
+config SYS_BOARD
+	default "ls1088a"
+
+config SYS_VENDOR
+	default "freescale"
+
+config SYS_SOC
+	default "fsl-layerscape"
+
+config SYS_CONFIG_NAME
+	default "ls1088aqds"
+
+endif
+
 if TARGET_LS1088ARDB
 
 config SYS_BOARD
board/freescale/ls1088a/MAINTAINERS +8 -0
index 12834f6..e1e6d4b 100644
@@ -5,3 +5,11 @@ S:	Maintained
 F:	board/freescale/ls1088a/
 F:	include/configs/ls1088ardb.h
 F:	configs/ls1088ardb_qspi_defconfig
+
+LS1088AQDS BOARD
+M:	Prabhakar Kushwaha <[email protected]>
+M:	Ashish Kumar <[email protected]>
+S:	Maintained
+F:	board/freescale/ls1088a/
+F:	include/configs/ls1088aqds.h
+F:	configs/ls1088aqds_qspi_defconfig
board/freescale/ls1088a/Makefile +1 -0
index e997cf1..bdcce9e 100644
@@ -6,4 +6,5 @@
 
 obj-y += ls1088a.o
 obj-$(CONFIG_TARGET_LS1088ARDB) += eth_ls1088ardb.o
+obj-$(CONFIG_TARGET_LS1088AQDS) += eth_ls1088aqds.o
 obj-y += ddr.o
board/freescale/ls1088a/README +79 -0

82 lines not on this page · raw message

board/freescale/ls1088a/ddr.h +5 -0
index dfcfc1f..a1ad709 100644
@@ -34,6 +34,11 @@ static const struct board_specific_parameters udimm0[] = {
 	{2,  1900, 0, 4,     7, 0x09090B0D, 0x0E10120B,},
 	{2,  2300, 0, 8,     9, 0x0A0C0E11, 0x1214160F,},
 	{}
+#elif defined(CONFIG_TARGET_LS1088AQDS)
+	{2,  1666, 0, 8,     8, 0x0A0A0C0E, 0x0F10110C,},
+	{2,  1900, 0, 4,     7, 0x09090B0D, 0x0E10120B,},
+	{2,  2300, 0, 4,     9, 0x0A0C0D11, 0x1214150E,},
+	{}
 
 #endif
 };
board/freescale/ls1088a/eth_ls1088aqds.c new file +650 -0

650 lines not on this page · raw message

board/freescale/ls1088a/ls1088a.c +79 -5

125 lines not on this page · raw message

board/freescale/ls1088a/ls1088a_qixis.h +5 -0
index 9757d1b..4790461 100644
@@ -31,4 +31,9 @@
 #define QIXIS_SDCLK1_165		0x2
 #define QIXIS_SDCLK1_100_SP		0x3
 
+#define BRDCFG4_EMISEL_MASK		0xE0
+#define BRDCFG4_EMISEL_SHIFT		5
+#define BRDCFG9_SFPTX_MASK		0x10
+#define BRDCFG9_SFPTX_SHIFT		4
+
 #endif
configs/ls1088aqds_qspi_defconfig new file +29 -0
new file mode 100644
index 0000000..6fff149
@@ -0,0 +1,29 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1088AQDS=y
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT"
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_SYS_NS16550=y
+CONFIG_FSL_DSPI=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_FSL_LS_PPA=y
include/configs/ls1088aqds.h new file +414 -0

414 lines not on this page · raw message

Signature · 1 line
2.7.4
Applied
#5 lore raw

PATCH v5 3/3 armv8: ls1088aqds: Add support of LS1088AQDS

Quoted 7 lines · Ashish Kumar

This patch add support of LS1088AQDS platform.

The LS1088A QorIQTM Development System (QDS) is a high-performance computing, evaluation, and
development platform that supports the LS1088A QorIQ Architecture processor.

Quoted 9 lines
Signed-off-by Prabhakar Kushwaha <[email protected]>
Signed-off-by Shaohui Xie <[email protected]>
Signed-off-by Ashish Kumar <[email protected]>

---
v5:
Fix checkpatch's check
Change getenv() to env_get()
Rebase to top commit "8b3cec7 mtdparts: Fix uninitialized scalar usage"

Applied to fsl-qoriq master. Thanks.

York

#6 lore raw

PATCH v5 1/3 armv8: ls1088a: Add NXP LS1088A SoC support

In reply to Ashish Kumar
Quoted 23 lines · Ashish Kumar

The QorIQ LS1088A processor is built on the Layerscape architecture combining eight ARM A53 processor cores with advanced, high-performance datapath acceleration and networks, peripheral interfaces required for networking, wireless infrastructure, and general-purpose embedded applications.

LS1088A is compliant with the Layerscape Chassis Generation 3.

Features summary:
- Eight 32-bit / 64-bit ARM v8 Cortex-A53 CPUs
- Cores are in 2 cluster of 4-cores each
- Cache coherent interconnect (CCI-400)
- One 64-bit DDR4 SDRAM memory controller with ECC
- Data path acceleration architecture 2.0 (DPAA2)
- Ethernet interfaces: SGMIIs, RGMIIs, QSGMIIs, XFIs
- QSPI, IFC, 3 PCIe, 1 SATA, 2 USB, 1 SDXC, 2 DUARTs etc

Signed-off-by Alison Wang <[email protected]>
Signed-off-by Prabhakar Kushwaha <[email protected]>
Signed-off-by Ashish Kumar <[email protected]>
Signed-off-by Raghav Dogra <[email protected]>
Signed-off-by Shaohui Xie <[email protected]>
Quoted 5 lines

---

v5:
No change

Revised commit message. Applied to fsl-qoriq master. Thanks.

York