FAILED: patch "[PATCH] drm/i915/perf: fix flex eu registers programming" failed to apply to 4.13-stable tree
Subsystems (3)
[email protected]
maintainerThe patch below does not apply to the 4.13-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
Quoted 1 line
From
01d928e9a1644eb2e28f684905f888e700c7b9dcMon Sep 17 00:00:00 2001
From: Lionel Landwerlin <[email protected]>
Date: Thu, 3 Aug 2017 17:58:07 +0100
Subject: [PATCH] drm/i915/perf: fix flex eu registers programming
We were reserving fewer dwords in the ring than necessary. Indeed we're always writing all registers once, so discard the actual number of registers given by the user and just program the whitelisted ones once.
Fixes 19f81df2859e ("drm/i915/perf: Add OA unit support for Gen 8+")
Reported-by Matthew Auld <[email protected]>
Signed-off-by Lionel Landwerlin <[email protected]>
Reviewed-by Matthew Auld <[email protected]>
Cc <[email protected]> # v4.12+
drivers/gpu/drm/i915/i915_perf.c +2 -2
@@ -1601,11 +1601,11 @@ static int gen8_emit_oa_config(struct drm_i915_gem_request *req)u32 *cs;int i; - cs =intel_ring_begin (req, n_flex_regs *2 +4 ); + cs =intel_ring_begin (req,ARRAY_SIZE (flex_mmio) *2 +4 );if (IS_ERR (cs))return PTR_ERR (cs); - *cs++ =MI_LOAD_REGISTER_IMM (n_flex_regs +1 ); + *cs++ =MI_LOAD_REGISTER_IMM (ARRAY_SIZE (flex_mmio) +1 ); *cs++ =i915_mmio_reg_offset (GEN8_OACTXCONTROL ); *cs++ = (dev_priv->perf.oa.period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) |