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drm/amd/powerplay: fix spelling typo in function name

PATCH In review Rex Zhu 1 participant 1 message Sep 8, 2017

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DRM drivers Radeon and amdgpu DRM drivers
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Rex Zhu

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PATCH 2/2 drm/amd/powerplay: fix spelling typo in function name

Change-Id Ic1b96b6efd2997240a26b6d8bc00e69f05ea4676
Signed-off-by Rex Zhu <[email protected]>
---
 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c | 8 ++++----
 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c   | 6 +++---
 2 files changed, 7 insertions(+), 7 deletions(-)
drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c +4 -4
index 51adf04..6c0efbd 100644
@@ -339,7 +339,7 @@ static int iceland_populate_pm_fuses(struct pp_hwmgr *hwmgr)
 	return 0;
 }
 
-static int iceland_get_dependecy_volt_by_clk(struct pp_hwmgr *hwmgr,
+static int iceland_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr,
 	struct phm_clock_voltage_dependency_table *allowed_clock_voltage_table,
 	uint32_t clock, uint32_t *vol)
 {

@@ -749,7 +749,7 @@ static int iceland_populate_single_graphic_level(struct pp_hwmgr *hwmgr,
 	result = iceland_calculate_sclk_params(hwmgr, engine_clock, graphic_level);
 
 	/* populate graphics levels*/
-	result = iceland_get_dependecy_volt_by_clk(hwmgr,
+	result = iceland_get_dependency_volt_by_clk(hwmgr,
 		hwmgr->dyn_state.vddc_dependency_on_sclk, engine_clock,
 		&graphic_level->MinVddc);
 	PP_ASSERT_WITH_CODE((0 == result),

@@ -1104,7 +1104,7 @@ static int iceland_populate_single_memory_level(
 	uint32_t mclk_strobe_mode_threshold = 40000;
 
 	if (hwmgr->dyn_state.vddc_dependency_on_mclk != NULL) {
-		result = iceland_get_dependecy_volt_by_clk(hwmgr,
+		result = iceland_get_dependency_volt_by_clk(hwmgr,
 			hwmgr->dyn_state.vddc_dependency_on_mclk, memory_clock, &memory_level->MinVddc);
 		PP_ASSERT_WITH_CODE((0 == result),
 			"can not find MinVddc voltage value from memory VDDC voltage dependency table", return result);

@@ -1113,7 +1113,7 @@ static int iceland_populate_single_memory_level(
 	if (data->vddci_control == SMU7_VOLTAGE_CONTROL_NONE) {
 		memory_level->MinVddci = memory_level->MinVddc;
 	} else if (NULL != hwmgr->dyn_state.vddci_dependency_on_mclk) {
-		result = iceland_get_dependecy_volt_by_clk(hwmgr,
+		result = iceland_get_dependency_volt_by_clk(hwmgr,
 				hwmgr->dyn_state.vddci_dependency_on_mclk,
 				memory_clock,
 				&memory_level->MinVddci);
drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c +3 -3
index 65d3a48..fefa066 100644
@@ -97,7 +97,7 @@
  */
 
 
-static int tonga_get_dependecy_volt_by_clk(struct pp_hwmgr *hwmgr,
+static int tonga_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr,
 	phm_ppt_v1_clock_voltage_dependency_table *allowed_clock_voltage_table,
 	uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd)
 {

@@ -539,7 +539,7 @@ static int tonga_populate_single_graphic_level(struct pp_hwmgr *hwmgr,
 	result = tonga_calculate_sclk_params(hwmgr, engine_clock, graphic_level);
 
 	/* populate graphics levels*/
-	result = tonga_get_dependecy_volt_by_clk(hwmgr,
+	result = tonga_get_dependency_volt_by_clk(hwmgr,
 		pptable_info->vdd_dep_on_sclk, engine_clock,
 		&graphic_level->MinVoltage, &mvdd);
 	PP_ASSERT_WITH_CODE((!result),

@@ -895,7 +895,7 @@ static int tonga_populate_single_memory_level(
 	uint32_t mclk_strobe_mode_threshold = 40000;
 
 	if (NULL != pptable_info->vdd_dep_on_mclk) {
-		result = tonga_get_dependecy_volt_by_clk(hwmgr,
+		result = tonga_get_dependency_volt_by_clk(hwmgr,
 				pptable_info->vdd_dep_on_mclk,
 				memory_clock,
 				&memory_level->MinVoltage, &mvdd);
Signature · 6 lines
1.9.1

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