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blk: Remove various places that do flush cache after read

PATCH Superseded Bin Meng 2 participants 3 messages Sep 13, 2017 – Sep 15, 2017

Subsystems (5)
Network drivers Arm (32-bit) Block layer Ethernet PHY +1 more subsystems
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Bin Meng

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#0 lore raw

PATCH v2 1/1 blk: Remove various places that do flush cache after read

All these places seem to inherit the codes from the MMC driver where a FIXME was put in the comment. However the correct operation after read should be cache invalidate, not flush.

The underlying drivers should be responsible for the cache operation. Remove these codes completely.

Signed-off-by Bin Meng <[email protected]>
Reviewed-by Stefan Roese <[email protected]>
Reviewed-by York Sun <[email protected]>
Reviewed-by Joe Hershberger <[email protected]>
Reviewed-by Simon Glass <[email protected]>
Tested-by York Sun <[email protected]>

---

Changes in v2:
- rebase on top of u-boot/master

 arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 15 ---------------
 board/toradex/common/tdx-cfg-block.c    |  2 --
 cmd/mmc.c                               |  2 --
 drivers/block/blk-uclass.c              |  3 ---
 drivers/block/blk_legacy.c              |  3 ---
 drivers/net/fm/fm.c                     |  2 --
 drivers/net/phy/cortina.c               |  2 --
 drivers/qe/qe.c                         |  2 --
 8 files changed, 31 deletions(-)
arch/arm/cpu/armv8/fsl-layerscape/ppa.c +0 -15
index 24ddb5d..bbf8bba 100644
@@ -107,9 +107,6 @@ int ppa_init(void)
 		return -EIO;
 	}
 
-	/* flush cache after read */
-	flush_cache((ulong)fitp, cnt * 512);
-
 	ret = fdt_check_header(fitp);
 	if (ret) {
 		free(fitp);

@@ -134,9 +131,6 @@ int ppa_init(void)
 	}
 	debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
 
-	/* flush cache after read */
-	flush_cache((ulong)ppa_hdr_ddr, cnt * 512);
-
 	ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
 #endif
 

@@ -164,9 +158,6 @@ int ppa_init(void)
 		return -EIO;
 	}
 
-	/* flush cache after read */
-	flush_cache((ulong)ppa_fit_addr, cnt * 512);
-
 #elif defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
 	struct fdt_header fit;
 

@@ -208,9 +199,6 @@ int ppa_init(void)
 	}
 	debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
 
-	/* flush cache after read */
-	flush_cache((ulong)ppa_hdr_ddr, fw_length);
-
 	ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
 #endif
 

@@ -232,9 +220,6 @@ int ppa_init(void)
 		       CONFIG_SYS_LS_PPA_FW_ADDR);
 		return -EIO;
 	}
-
-	/* flush cache after read */
-	flush_cache((ulong)ppa_fit_addr, fw_length);
 #else
 #error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
 #endif
board/toradex/common/tdx-cfg-block.c +0 -2
index 328c4c0..f850a3c 100644
@@ -129,8 +129,6 @@ static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
 			ret = -EIO;
 			goto out;
 		}
-		/* Flush cache after read */
-		flush_cache((ulong)(unsigned char *)config_block, 512);
 	} else {
 		/* Just writing one 512 byte block */
 		if (blk_dwrite(mmc_get_blk_desc(mmc), blk_start, 1,
cmd/mmc.c +0 -2
index 00697fc..5def4ea 100644
@@ -293,8 +293,6 @@ static int do_mmc_read(cmd_tbl_t *cmdtp, int flag,
 	       curr_device, blk, cnt);
 
 	n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr);
-	/* flush cache after read */
-	flush_cache((ulong)addr, cnt * 512); /* FIXME */
 	printf("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
 
 	return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
drivers/block/blk-uclass.c +0 -3
index aee2a50..537cf5f 100644
@@ -294,9 +294,6 @@ ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start,
 	if (IS_ERR_VALUE(n))
 		return n;
 
-	/* flush cache after read */
-	flush_cache((ulong)buffer, blkcnt * desc->blksz);
-
 	return n;
 }
drivers/block/blk_legacy.c +0 -3
index 981872e..16d3bfe 100644
@@ -232,9 +232,6 @@ ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start,
 	if (IS_ERR_VALUE(n))
 		return n;
 
-	/* flush cache after read */
-	flush_cache((ulong)buffer, blkcnt * desc->blksz);
-
 	return n;
 }
drivers/net/fm/fm.c +0 -2
index 451dfde..261f1b9 100644
@@ -405,8 +405,6 @@ int fm_init_common(int index, struct ccsr_fman *reg)
 		mmc_init(mmc);
 		(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
 						addr);
-		/* flush cache after read */
-		flush_cache((ulong)addr, cnt * 512);
 	}
 #elif defined(CONFIG_SYS_QE_FMAN_FW_IN_REMOTE)
 	void *addr = (void *)CONFIG_SYS_FMAN_FW_ADDR;
drivers/net/phy/cortina.c +0 -2
index e0e9ed9..637d89a 100644
@@ -177,8 +177,6 @@ void cs4340_upload_firmware(struct phy_device *phydev)
 		mmc_init(mmc);
 		(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
 						addr);
-		/* flush cache after read */
-		flush_cache((ulong)addr, cnt * 512);
 	}
 #endif
drivers/qe/qe.c +0 -2
index 8151068..5366a1e 100644
@@ -221,8 +221,6 @@ void u_qe_init(void)
 		mmc_init(mmc);
 		(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
 						addr);
-		/* flush cache after read */
-		flush_cache((ulong)addr, cnt * 512);
 	}
 #endif
 	if (!u_qe_upload_firmware(addr))
Signature · 1 line
2.9.2
author
#1 lore raw

PATCH v2 1/1 blk: Remove various places that do flush cache after read

Hi Tom,

Quoted 19 lines · Bin Meng

All these places seem to inherit the codes from the MMC driver where a FIXME was put in the comment. However the correct operation after read should be cache invalidate, not flush.

The underlying drivers should be responsible for the cache operation. Remove these codes completely.

Signed-off-by Bin Meng <[email protected]>
Reviewed-by Stefan Roese <[email protected]>
Reviewed-by York Sun <[email protected]>
Reviewed-by Joe Hershberger <[email protected]>
Reviewed-by Simon Glass <[email protected]>
Tested-by York Sun <[email protected]>

---

Changes in v2:
- rebase on top of u-boot/master

Quoted 10 lines
 arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 15 ---------------
 board/toradex/common/tdx-cfg-block.c    |  2 --
 cmd/mmc.c                               |  2 --
 drivers/block/blk-uclass.c              |  3 ---
 drivers/block/blk_legacy.c              |  3 ---
 drivers/net/fm/fm.c                     |  2 --
 drivers/net/phy/cortina.c               |  2 --
 drivers/qe/qe.c                         |  2 --
 8 files changed, 31 deletions(-)

Will you apply this one?

Regards,
Bin

#2 lore raw

PATCH v2 1/1 blk: Remove various places that do flush cache after read

In reply to Bin Meng
Quoted 7 lines · Bin Meng

All these places seem to inherit the codes from the MMC driver where a FIXME was put in the comment. However the correct operation after read should be cache invalidate, not flush.

The underlying drivers should be responsible for the cache operation. Remove these codes completely.

Quoted 6 lines
Signed-off-by Bin Meng <[email protected]>
Reviewed-by Stefan Roese <[email protected]>
Reviewed-by York Sun <[email protected]>
Reviewed-by Joe Hershberger <[email protected]>
Reviewed-by Simon Glass <[email protected]>
Tested-by York Sun <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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