patch "iio: trigger: stm32-timer: preset shouldn't be buffered" added to staging-linus
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This is a note to let you know that I've just added the patch titled
iio: trigger: stm32-timer: preset shouldn't be buffered
to my staging git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git
in the staging-linus branch.
The patch will show up in the next release of the linux-next tree (usually sometime within the next 24 hours during the week.)
The patch will hopefully also be merged in Linus's tree for the next -rc kernel release.
If you have any questions about this process, please let me know.
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0a56eabc4e3f730782e4a9f3af4f60aa03a8a849Mon Sep 17 00:00:00 2001
From: Fabrice Gasnier <[email protected]>
Date: Mon, 18 Sep 2017 12:05:30 +0200
Subject: iio: trigger: stm32-timer: preset shouldn't be buffered
Currently, setting preset value (ARR) will update directly 'Auto reload value' only on 1st write access. But then, ARPE is set. This makes ARR a shadow register. Preset value should be updated upon each write request: ensure ARPE is 0. This fixes successive writes to preset attribute.
--- drivers/iio/trigger/stm32-timer-trigger.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/iio/trigger/stm32-timer-trigger.c +2 -1
@@ -681,8 +681,9 @@ static ssize_t stm32_count_set_preset(struct iio_dev *indio_dev,if (ret)return ret; +/* TIMx_ARR register shouldn't be buffered (ARPE=0) */ +regmap_update_bits (priv->regmap,TIM_CR1 ,TIM_CR1_ARPE ,0 );regmap_write (priv->regmap,TIM_ARR , preset); -regmap_update_bits (priv->regmap,TIM_CR1 ,TIM_CR1_ARPE ,TIM_CR1_ARPE );return len; }
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2.14.1