Skip to contentSkip to conversation

Patch "clk: sunxi-ng: fix PLL_CPUX adjusting on H3" has been added to the 4.9-stable tree

PATCH [email protected] 1 participant 1 message Oct 5, 2017

Subsystems (3)
lore
Share & tools
lore

[email protected]

author maintainer Applied
#0 lore raw

This is a note to let you know that I've just added the patch titled

clk: sunxi-ng: fix PLL_CPUX adjusting on H3

to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
clk-sunxi-ng-fix-pll_cpux-adjusting-on-h3.patch
and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From foo@baz Thu Oct 5 10:28:31 CEST 2017

From: Ondrej Jirman <[email protected]>
Date: Fri, 25 Nov 2016 01:28:47 +0100
Subject: clk: sunxi-ng: fix PLL_CPUX adjusting on H3

From: Ondrej Jirman <[email protected]>

[ Upstream commit a43c96427e713bea94e9ef50e8be1f493afc0691 ]

When adjusting PLL_CPUX on H3, the PLL is temporarily driven too high, and the system becomes unstable (oopses or hangs).

Add a notifier to avoid this situation by temporarily switching to a known stable 24 MHz oscillator.

---
 drivers/clk/sunxi-ng/ccu-sun8i-h3.c |   10 ++++++++++
 1 file changed, 10 insertions(+)
drivers/clk/sunxi-ng/ccu-sun8i-h3.c +10 -0
@@ -803,6 +803,13 @@ static const struct sunxi_ccu_desc sun8i
 	.num_resets	= ARRAY_SIZE(sun8i_h3_ccu_resets),
 };
 
+static struct ccu_mux_nb sun8i_h3_cpu_nb = {
+	.common		= &cpux_clk.common,
+	.cm		= &cpux_clk.mux,
+	.delay_us	= 1, /* > 8 clock cycles at 24 MHz */
+	.bypass_index	= 1, /* index of 24 MHz oscillator */
+};
+
 static void __init sun8i_h3_ccu_setup(struct device_node *node)
 {
 	void __iomem *reg;
@@ -821,6 +828,9 @@ static void __init sun8i_h3_ccu_setup(st
 	writel(val | (3 << 16), reg + SUN8I_H3_PLL_AUDIO_REG);
 
 	sunxi_ccu_probe(node, reg, &sun8i_h3_ccu_desc);
+
+	ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,
+				  &sun8i_h3_cpu_nb);
 }
 CLK_OF_DECLARE(sun8i_h3_ccu, "allwinner,sun8i-h3-ccu",
 	       sun8i_h3_ccu_setup);

Patches currently in stable-queue which might be from [email protected] are

queue-4.9/clk-sunxi-ng-fix-pll_cpux-adjusting-on-h3.patch