Patch "x86/mm: Rework lazy TLB to track the actual loaded mm" has been added to the 4.9-stable tree
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This is a note to let you know that I've just added the patch titled
x86/mm: Rework lazy TLB to track the actual loaded mm
to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
x86-mm-rework-lazy-tlb-to-track-the-actual-loaded-mm.patch
and it can be found in the queue-4.9 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
3d28ebceaffab40f30afa87e33331560148d7b8bMon Sep 17 00:00:00 2001
From: Andy Lutomirski <[email protected]>
Date: Sun, 28 May 2017 10:00:15 -0700
Subject: x86/mm: Rework lazy TLB to track the actual loaded mm
From: Andy Lutomirski <[email protected]>
commit 3d28ebceaffab40f30afa87e33331560148d7b8b upstream.
Lazy TLB state is currently managed in a rather baroque manner. AFAICT, there are three possible states:
- Non-lazy. This means that we're running a user thread or a kernel thread that has called use_mm(). current->mm == current->active_mm == cpu_tlbstate.active_mm and cpu_tlbstate.state == TLBSTATE_OK.
- Lazy with user mm. We're running a kernel thread without an mm and we're borrowing an mm_struct. We have current->mm == NULL, current->active_mm == cpu_tlbstate.active_mm, cpu_tlbstate.state != TLBSTATE_OK (i.e. TLBSTATE_LAZY or 0). The current cpu is set in mm_cpumask(current->active_mm). CR3 points to current->active_mm->pgd. The TLB is up to date.
- Lazy with init_mm. This happens when we call leave_mm(). We have current->mm == NULL, current->active_mm == cpu_tlbstate.active_mm, but that mm is only relelvant insofar as the scheduler is tracking it for refcounting. cpu_tlbstate.state != TLBSTATE_OK. The current cpu is clear in mm_cpumask(current->active_mm). CR3 points to swapper_pg_dir, i.e. init_mm->pgd.
This patch simplifies the situation. Other than perf, x86 stops caring about current->active_mm at all. We have cpu_tlbstate.loaded_mm pointing to the mm that CR3 references. The TLB is always up to date for that mm. leave_mm() just switches us to init_mm. There are no longer any special cases for mm_cpumask, and switch_mm() switches mms without worrying about laziness.
After this patch, cpu_tlbstate.state serves only to tell the TLB flush code whether it may switch to init_mm instead of doing a normal flush.
This makes fairly extensive changes to xen_exit_mmap(), which used to look a bit like black magic.
Perf is unchanged. With or without this change, perf may behave a bit erratically if it tries to read user memory in kernel thread context. We should build on this patch to teach perf to never look at user memory when cpu_tlbstate.loaded_mm != current->mm.
--- arch/x86/events/core.c | 3 arch/x86/include/asm/tlbflush.h | 12 +- arch/x86/kernel/ldt.c | 7 - arch/x86/mm/init.c | 2 arch/x86/mm/tlb.c | 216 ++++++++++++++++++++-------------------- arch/x86/xen/mmu.c | 51 ++++----- 6 files changed, 147 insertions(+), 144 deletions(-)
arch/x86/events/core.c +1 -2
@@ -2100,8 +2100,7 @@ static int x86_pmu_event_init(struct perstatic void refresh_pce (void *ignored) { -if (current->active_mm) -load_mm_cr4 (current->active_mm); +load_mm_cr4 (this_cpu_read (cpu_tlbstate.loaded_mm)); }static void x86_pmu_event_mapped (struct perf_event *event)
arch/x86/include/asm/tlbflush.h +10 -2
@@ -66,7 +66,13 @@ static inline void invpcid_flush_all_non#endif struct tlb_state { -struct mm_struct *active_mm; +/* +* cpu_tlbstate.loaded_mm should match CR3 whenever interrupts +* are on. This means that it may not match current->active_mm, +* which will contain the previous user mm when we're in lazy TLB +* mode even if we've already switched back to swapper_pg_dir. +*/ +struct mm_struct *loaded_mm;int state;/*
@@ -249,7 +255,9 @@ void native_flush_tlb_others(const strucstatic inline void reset_lazy_tlbstate (void ) {this_cpu_write (cpu_tlbstate.state,0 ); -this_cpu_write (cpu_tlbstate.active_mm, &init_mm); +this_cpu_write (cpu_tlbstate.loaded_mm, &init_mm); + +WARN_ON (read_cr3 () !=__pa_symbol (swapper_pg_dir)); } static inline void arch_tlbbatch_add_mm(struct arch_tlbflush_unmap_batch *batch,
arch/x86/kernel/ldt.c +4 -3
@@ -23,14 +23,15 @@#include <asm/syscalls.h> /* context.lock is held for us, so we don't need any locking. */ -static void flush_ldt (void *current_mm) +static void flush_ldt (void *__mm) { +struct mm_struct *mm = __mm;mm_context_t *pc; -if (current->active_mm != current_mm) +if (this_cpu_read (cpu_tlbstate.loaded_mm) != mm)return ; - pc = ¤t->active_mm->context; + pc = &mm->context;set_ldt (pc->ldt->entries, pc->ldt->size); }
arch/x86/mm/init.c +1 -1
@@ -764,7 +764,7 @@ void __init zone_sizes_init(void) } DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { - .active_mm = &init_mm, + .loaded_mm = &init_mm, .state =0 , .cr4 = ~0UL ,/* fail hard if we screw up cr4 shadow initialization */ };
arch/x86/mm/tlb.c +108 -108
256 lines not on this page · raw message
arch/x86/xen/mmu.c +23 -28
91 lines not on this page · raw message
Patches currently in stable-queue which might be from [email protected] are
queue-4.9/x86-mm-refactor-flush_tlb_mm_range-to-merge-local-and-remote-cases.patch queue-4.9/x86-mm-pass-flush_tlb_info-to-flush_tlb_others-etc.patch queue-4.9/x86-mm-rework-lazy-tlb-to-track-the-actual-loaded-mm.patch queue-4.9/x86-mm-kvm-teach-kvm-s-vmx-code-that-cr3-isn-t-a-constant.patch queue-4.9/x86-mm-use-new-merged-flush-logic-in-arch_tlbbatch_flush.patch queue-4.9/x86-kvm-vmx-simplify-segment_base.patch queue-4.9/x86-entry-unwind-create-stack-frames-for-saved-interrupt-registers.patch queue-4.9/x86-mm-reduce-indentation-in-flush_tlb_func.patch queue-4.9/x86-mm-remove-the-up-asm-tlbflush.h-code-always-use-the-formerly-smp-code.patch queue-4.9/x86-mm-reimplement-flush_tlb_page-using-flush_tlb_mm_range.patch queue-4.9/mm-x86-mm-make-the-batched-unmap-tlb-flush-api-more-generic.patch queue-4.9/x86-kvm-vmx-defer-tr-reload-after-vm-exit.patch queue-4.9/x86-mm-change-the-leave_mm-condition-for-local-tlb-flushes.patch queue-4.9/x86-mm-be-more-consistent-wrt-page_shift-vs-page_size-in-tlb-flush-code.patch