Patch "drm/i915: Whitelist SLICE_COMMON_ECO_CHICKEN1 on Geminilake." has been added to the 4.14-stable tree
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This is a note to let you know that I've just added the patch titled
drm/i915: Whitelist SLICE_COMMON_ECO_CHICKEN1 on Geminilake.
to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-i915-whitelist-slice_common_eco_chicken1-on-geminilake.patch
and it can be found in the queue-4.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
4636bda86aa1f34f45c629477476a0dcfa04e597Mon Sep 17 00:00:00 2001
From: Kenneth Graunke <[email protected]>
Date: Fri, 5 Jan 2018 00:59:05 -0800
Subject: drm/i915: Whitelist SLICE_COMMON_ECO_CHICKEN1 on Geminilake.
From: Kenneth Graunke <[email protected]>
commit 4636bda86aa1f34f45c629477476a0dcfa04e597 upstream.
Geminilake requires the 3D driver to select whether barriers are intended for compute shaders, or tessellation control shaders, by whacking a "Barrier Mode" bit in SLICE_COMMON_ECO_CHICKEN1 when switching pipelines. Failure to do this properly can result in GPU hangs.
Unfortunately, this means it needs to switch mid-batch, so only userspace can properly set it. To facilitate this, the kernel needs to whitelist the register.
The workarounds page currently tags this as applying to Broxton only, but that doesn't make sense. The documentation for the register it references says the bit userspace is supposed to toggle only exists on Geminilake. Empirically, the Mesa patch to toggle this bit appears to fix intermittent GPU hangs in tessellation control shader barrier tests on Geminilake; we haven't seen those hangs on Broxton.
v2: Mention WA #0862 in the comment (it doesn't have a name).
--- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++++ 2 files changed, 7 insertions(+)
drivers/gpu/drm/i915/i915_reg.h +2 -0
@@ -6987,6 +6987,8 @@ enum {#define GEN9_SLICE_COMMON_ECO_CHICKEN0 _MMIO(0x7308)#define DISABLE_PIXEL_MASK_CAMMING (1<<14) +#define GEN9_SLICE_COMMON_ECO_CHICKEN1 _MMIO(0x731c) +#define GEN7_L3SQCREG1 _MMIO(0xB010)#define VLV_B0_WA_L3SQCREG1_VALUE 0x00D30000
drivers/gpu/drm/i915/intel_engine_cs.c +5 -0
@@ -1125,6 +1125,11 @@ static int glk_init_workarounds(struct iif (ret)return ret; +/* WA #0862: Userspace has to set "Barrier Mode" to avoid hangs. */ + ret =wa_ring_whitelist_reg (engine,GEN9_SLICE_COMMON_ECO_CHICKEN1 ); +if (ret) +return ret; +/* WaToEnableHwFixForPushConstHWBug:glk */ WA_SET_BIT_MASKED (COMMON_SLICE_CHICKEN2 ,GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION );
Patches currently in stable-queue which might be from [email protected] are
queue-4.14/drm-i915-whitelist-slice_common_eco_chicken1-on-geminilake.patch