Patch "[Variant 2/Spectre-v2] arm64: KVM: Use per-CPU vector when BP hardening is enabled" has been added to the 4.15-stable tree
Subsystems (4)
This is a note to let you know that I've just added the patch titled
[Variant 2/Spectre-v2] arm64: KVM: Use per-CPU vector when BP hardening is enabled
to the 4.15-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-kvm-use-per-cpu-vector-when-bp-hardening-is-enabled.patch
and it can be found in the queue-4.15 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From foo@baz Tue Feb 13 17:25:10 CET 2018
From: Marc Zyngier <[email protected]>
Date: Wed, 3 Jan 2018 16:38:35 +0000
Subject: [Variant 2/Spectre-v2] arm64: KVM: Use per-CPU vector when BP hardening is enabled
From: Marc Zyngier <[email protected]>
Commit 6840bdd73d07 upstream.
Now that we have per-CPU vectors, let's plug then in the KVM/arm64 code.
Conflicts:
arch/arm/include/asm/kvm_mmu.h
arch/arm64/include/asm/kvm_mmu.h
--- arch/arm/include/asm/kvm_mmu.h | 10 ++++++++++ arch/arm64/include/asm/kvm_mmu.h | 38 ++++++++++++++++++++++++++++++++++++++ arch/arm64/kvm/hyp/switch.c | 2 +- virt/kvm/arm/arm.c | 8 +++++++- 4 files changed, 56 insertions(+), 2 deletions(-)
arch/arm/include/asm/kvm_mmu.h +10 -0
@@ -221,6 +221,16 @@ static inline unsigned int kvm_get_vmid_return 8 ; } +static inline void *kvm_get_hyp_vector (void ) +{ +return kvm_ksym_ref (__kvm_hyp_vector); +} + +static inline int kvm_map_vectors (void ) +{ +return 0 ; +} +#endif /* !__ASSEMBLY__ */ #endif /* __ARM_KVM_MMU_H__ */
arch/arm64/include/asm/kvm_mmu.h +38 -0
@@ -309,5 +309,43 @@ static inline unsigned int kvm_get_vmid_return (cpuid_feature_extract_unsigned_field (reg,ID_AA64MMFR1_VMIDBITS_SHIFT ) ==2 ) ?16 :8 ; } +#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR +#include <asm/mmu.h> + +static inline void *kvm_get_hyp_vector (void ) +{ +struct bp_hardening_data *data =arm64_get_bp_hardening_data (); +void *vect =kvm_ksym_ref (__kvm_hyp_vector); + +if (data->fn) { + vect = __bp_harden_hyp_vecs_start + + data->hyp_vectors_slot *SZ_2K ; + +if (!has_vhe ()) + vect =lm_alias (vect); + } + +return vect; +} + +static inline int kvm_map_vectors (void ) +{ +return create_hyp_mappings (kvm_ksym_ref (__bp_harden_hyp_vecs_start), +kvm_ksym_ref (__bp_harden_hyp_vecs_end), +PAGE_HYP_EXEC ); +} + +#else +static inline void *kvm_get_hyp_vector (void ) +{ +return kvm_ksym_ref (__kvm_hyp_vector); +} + +static inline int kvm_map_vectors (void ) +{ +return 0 ; +} +#endif +#endif /* __ASSEMBLY__ */ #endif /* __ARM64_KVM_MMU_H__ */
arch/arm64/kvm/hyp/switch.c +1 -1
@@ -52,7 +52,7 @@ static void __hyp_text __activate_traps_ val &= ~(CPACR_EL1_FPEN |CPACR_EL1_ZEN );write_sysreg (val, cpacr_el1); -write_sysreg (__kvm_hyp_vector, vbar_el1); +write_sysreg (kvm_get_hyp_vector (), vbar_el1); } static void __hyp_text __activate_traps_nvhe(void)
virt/kvm/arm/arm.c +7 -1
@@ -1158,7 +1158,7 @@ static void cpu_init_hyp_mode(void *dumm pgd_ptr =kvm_mmu_get_httbr (); stack_page =__this_cpu_read (kvm_arm_hyp_stack_page); hyp_stack_ptr = stack_page +PAGE_SIZE ; - vector_ptr = (unsigned long )kvm_ksym_ref (__kvm_hyp_vector); + vector_ptr = (unsigned long )kvm_get_hyp_vector ();__cpu_init_hyp_mode (pgd_ptr, hyp_stack_ptr, vector_ptr);__cpu_init_stage2 ();
@@ -1403,6 +1403,12 @@ static int init_hyp_mode(void) goto out_err; } + err =kvm_map_vectors (); +if (err) { +kvm_err ("Cannot map vectors\n" ); + goto out_err; + } +/* * Map the Hyp stack pages */
Patches currently in stable-queue which might be from [email protected] are
queue-4.15/arm-arm64-smccc-make-function-identifiers-an-unsigned-quantity.patch queue-4.15/arm64-move-bp-hardening-to-check_and_switch_context.patch queue-4.15/arm-arm64-kvm-advertise-smccc-v1.1.patch queue-4.15/arm64-move-post_ttbr_update_workaround-to-c-code.patch queue-4.15/firmware-psci-expose-psci-conduit.patch queue-4.15/arm64-force-kpti-to-be-disabled-on-cavium-thunderx.patch queue-4.15/arm64-entry-apply-bp-hardening-for-high-priority-synchronous-exceptions.patch queue-4.15/arm64-kpti-fix-the-interaction-between-asid-switching-and-software-pan.patch queue-4.15/firmware-psci-expose-smccc-version-through-psci_ops.patch queue-4.15/arm64-implement-branch-predictor-hardening-for-affected-cortex-a-cpus.patch queue-4.15/arm-arm64-kvm-add-psci_version-helper.patch queue-4.15/arm64-kill-psci_get_version-as-a-variant-2-workaround.patch queue-4.15/arm64-entry-apply-bp-hardening-for-suspicious-interrupts-from-el0.patch queue-4.15/arm64-capabilities-handle-duplicate-entries-for-a-capability.patch queue-4.15/arm64-add-arm_smccc_arch_workaround_1-bp-hardening-support.patch queue-4.15/arm-arm64-kvm-turn-kvm_psci_version-into-a-static-inline.patch queue-4.15/arm-arm64-kvm-implement-psci-1.0-support.patch queue-4.15/arm64-kvm-add-smccc_arch_workaround_1-fast-handling.patch queue-4.15/arm64-kvm-report-smccc_arch_workaround_1-bp-hardening-support.patch queue-4.15/arm-arm64-smccc-implement-smccc-v1.1-inline-primitive.patch queue-4.15/arm64-idmap-use-awx-flags-for-.idmap.text-.pushsection-directives.patch queue-4.15/arm64-kvm-make-psci_version-a-fast-path.patch queue-4.15/arm64-cpufeature-__this_cpu_has_cap-shouldn-t-stop-early.patch queue-4.15/arm64-kpti-add-enable-callback-to-remap-swapper-using-ng-mappings.patch queue-4.15/arm-arm64-kvm-consolidate-the-psci-include-files.patch queue-4.15/arm64-add-skeleton-to-harden-the-branch-predictor-against-aliasing-attacks.patch queue-4.15/arm-arm64-kvm-add-smccc-accessors-to-psci-code.patch queue-4.15/arm64-kvm-use-per-cpu-vector-when-bp-hardening-is-enabled.patch queue-4.15/arm64-kvm-increment-pc-after-handling-an-smc-trap.patch