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Patch "pinctrl: sunxi: Fix A64 UART mux value" has been added to the 4.14-stable tree

PATCH [email protected] 1 participant 1 message Feb 23, 2018

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This is a note to let you know that I've just added the patch titled

pinctrl: sunxi: Fix A64 UART mux value

to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
pinctrl-sunxi-fix-a64-uart-mux-value.patch
and it can be found in the queue-4.14 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From foo@baz Fri Feb 23 11:45:09 CET 2018

From: Andre Przywara <[email protected]>
Date: Sat, 25 Nov 2017 12:12:30 +0000
Subject: pinctrl: sunxi: Fix A64 UART mux value

From: Andre Przywara <[email protected]>

[ Upstream commit 7c5c2c2d18d778e51fd8b899965097168306031c ]

To use pin PF4 as the RX signal of UART0, we have to write 0b011 into the respective pin controller register.
Fix the wrong value we had in our table so far.

Fixes 96851d391d02 ("drivers: pinctrl: add driver for Allwinner A64 SoC")
---
 drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c +1 -1
@@ -428,7 +428,7 @@ static const struct sunxi_desc_pin a64_p
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
 		  SUNXI_FUNCTION(0x2, "mmc0"),		/* D3 */
-		  SUNXI_FUNCTION(0x4, "uart0")),	/* RX */
+		  SUNXI_FUNCTION(0x3, "uart0")),	/* RX */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),

Patches currently in stable-queue which might be from [email protected] are

queue-4.14/pinctrl-sunxi-fix-a64-uart-mux-value.patch queue-4.14/pinctrl-sunxi-fix-a80-interrupt-pin-bank.patch