Patch "MIPS: ralink: Fix booting on MT7621" has been added to the 4.14-stable tree
Subsystems (4)
This is a note to let you know that I've just added the patch titled
MIPS: ralink: Fix booting on MT7621
to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
mips-ralink-fix-booting-on-mt7621.patch
and it can be found in the queue-4.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
a63d706ea719190a79a6c769e898f70680044d3eMon Sep 17 00:00:00 2001
From: NeilBrown <[email protected]>
Date: Wed, 21 Mar 2018 14:02:10 +1100
Subject: MIPS: ralink: Fix booting on MT7621
From: NeilBrown <[email protected]>
commit a63d706ea719190a79a6c769e898f70680044d3e upstream.
Since commit 3af5a67c86a3 ("MIPS: Fix early CM probing") the MT7621 has not been able to boot.
This commit caused mips_cm_probe() to be called before mt7621.c::proc_soc_init().
prom_soc_init() has a comment explaining that mips_cm_probe() "wipes out the bootloader config" and means that configuration registers are no longer available. It has some code to re-enable this config.
Before this re-enable code is run, the sysc register cannot be read, so when SYSC_REG_CHIP_NAME0 is read, a garbage value is returned and panic() is called.
If we move the config-repair code to the top of prom_soc_init(), the registers can be read and boot can proceed.
Very occasionally, the first register read after the reconfiguration returns garbage, so add a call to __sync().
Patchwork: https://patchwork.linux-mips.org/patch/18859/
--- arch/mips/ralink/mt7621.c | 42 ++++++++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 20 deletions(-)
arch/mips/ralink/mt7621.c +22 -20
@@ -170,6 +170,28 @@ void prom_soc_init(struct ralink_soc_infu32 n1;u32 rev; +/* Early detection of CMP support */ +mips_cm_probe (); +mips_cpc_probe (); + +if (mips_cps_numiocu (0 )) { +/* +* mips_cm_probe() wipes out bootloader +* config for CM regions and we have to configure them +* again. This SoC cannot talk to pamlbus devices +* witout proper iocu region set up. +* +* FIXME: it would be better to do this with values +* from DT, but we need this very early because +* without this we cannot talk to pretty much anything +* including serial. +*/ +write_gcr_reg0_base (MT7621_PALMBUS_BASE ); +write_gcr_reg0_mask (~MT7621_PALMBUS_SIZE | + CM_GCR_REGn_MASK_CMTGT_IOCU0); +__sync (); + } + n0 =__raw_readl (sysc +SYSC_REG_CHIP_NAME0 ); n1 =__raw_readl (sysc +SYSC_REG_CHIP_NAME1 );
@@ -194,26 +216,6 @@ void prom_soc_init(struct ralink_soc_inf rt2880_pinmux_data = mt7621_pinmux_data; -/* Early detection of CMP support */ -mips_cm_probe (); -mips_cpc_probe (); - -if (mips_cps_numiocu (0 )) { -/* -* mips_cm_probe() wipes out bootloader -* config for CM regions and we have to configure them -* again. This SoC cannot talk to pamlbus devices -* witout proper iocu region set up. -* -* FIXME: it would be better to do this with values -* from DT, but we need this very early because -* without this we cannot talk to pretty much anything -* including serial. -*/ -write_gcr_reg0_base (MT7621_PALMBUS_BASE ); -write_gcr_reg0_mask (~MT7621_PALMBUS_SIZE | - CM_GCR_REGn_MASK_CMTGT_IOCU0); - }if (!register_cps_smp_ops ())return ;
Patches currently in stable-queue which might be from [email protected] are
queue-4.14/mips-ralink-fix-booting-on-mt7621.patch queue-4.14/mips-ralink-remove-ralink_halt.patch