FAILED: patch "[PATCH] drm/amdgpu/pp/smu7: use a local variable for toc indexing" failed to apply to 4.17-stable tree
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[email protected]
maintainerThe patch below does not apply to the 4.17-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
Quoted 1 line
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02ce6ce2e1d07e31e8314c761a2caa087ea094ceMon Sep 17 00:00:00 2001
From: Alex Deucher <[email protected]>
Date: Thu, 12 Jul 2018 08:38:09 -0500
Subject: [PATCH] drm/amdgpu/pp/smu7: use a local variable for toc indexing
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Rather than using the index variable stored in vram. If the device fails to come back online after a resume cycle, reads from vram will return all 1s which will cause a segfault. Based on a patch from Thomas Martitz <[email protected]>. This avoids the segfault, but we still need to sort out why the GPU does not come back online after a resume.
drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c +12 -11
@@ -381,6 +381,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)uint32_t fw_to_load;int result =0 ;struct SMU_DRAMData_TOC *toc; +uint32_t num_entries =0 ;if (!hwmgr->reload_fw) {pr_info ("skip reloading...\n" );
@@ -422,41 +423,41 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr) } toc = (struct SMU_DRAMData_TOC *)smu_data->header; - toc->num_entries =0 ; toc->structure_version =1 ;PP_ASSERT_WITH_CODE (0 ==smu7_populate_single_firmware_entry (hwmgr, -UCODE_ID_RLC_G , &toc->entry[toc->num_entries++]), +UCODE_ID_RLC_G , &toc->entry[num_entries++]),"Failed to Get Firmware Entry." , return -EINVAL );PP_ASSERT_WITH_CODE (0 ==smu7_populate_single_firmware_entry (hwmgr, -UCODE_ID_CP_CE , &toc->entry[toc->num_entries++]), +UCODE_ID_CP_CE , &toc->entry[num_entries++]),"Failed to Get Firmware Entry." , return -EINVAL );PP_ASSERT_WITH_CODE (0 ==smu7_populate_single_firmware_entry (hwmgr, -UCODE_ID_CP_PFP , &toc->entry[toc->num_entries++]), +UCODE_ID_CP_PFP , &toc->entry[num_entries++]),"Failed to Get Firmware Entry." , return -EINVAL );PP_ASSERT_WITH_CODE (0 ==smu7_populate_single_firmware_entry (hwmgr, -UCODE_ID_CP_ME , &toc->entry[toc->num_entries++]), +UCODE_ID_CP_ME , &toc->entry[num_entries++]),"Failed to Get Firmware Entry." , return -EINVAL );PP_ASSERT_WITH_CODE (0 ==smu7_populate_single_firmware_entry (hwmgr, -UCODE_ID_CP_MEC , &toc->entry[toc->num_entries++]), +UCODE_ID_CP_MEC , &toc->entry[num_entries++]),"Failed to Get Firmware Entry." , return -EINVAL );PP_ASSERT_WITH_CODE (0 ==smu7_populate_single_firmware_entry (hwmgr, -UCODE_ID_CP_MEC_JT1 , &toc->entry[toc->num_entries++]), +UCODE_ID_CP_MEC_JT1 , &toc->entry[num_entries++]),"Failed to Get Firmware Entry." , return -EINVAL );PP_ASSERT_WITH_CODE (0 ==smu7_populate_single_firmware_entry (hwmgr, -UCODE_ID_CP_MEC_JT2 , &toc->entry[toc->num_entries++]), +UCODE_ID_CP_MEC_JT2 , &toc->entry[num_entries++]),"Failed to Get Firmware Entry." , return -EINVAL );PP_ASSERT_WITH_CODE (0 ==smu7_populate_single_firmware_entry (hwmgr, -UCODE_ID_SDMA0 , &toc->entry[toc->num_entries++]), +UCODE_ID_SDMA0 , &toc->entry[num_entries++]),"Failed to Get Firmware Entry." , return -EINVAL );PP_ASSERT_WITH_CODE (0 ==smu7_populate_single_firmware_entry (hwmgr, -UCODE_ID_SDMA1 , &toc->entry[toc->num_entries++]), +UCODE_ID_SDMA1 , &toc->entry[num_entries++]),"Failed to Get Firmware Entry." , return -EINVAL );if (!hwmgr->not_vf)PP_ASSERT_WITH_CODE (0 ==smu7_populate_single_firmware_entry (hwmgr, -UCODE_ID_MEC_STORAGE , &toc->entry[toc->num_entries++]), +UCODE_ID_MEC_STORAGE , &toc->entry[num_entries++]),"Failed to Get Firmware Entry." , return -EINVAL ); + toc->num_entries = num_entries;smu7_send_msg_to_smc_with_parameter (hwmgr,PPSMC_MSG_DRV_DRAM_ADDR_HI ,upper_32_bits (smu_data->header_buffer.mc_addr));smu7_send_msg_to_smc_with_parameter (hwmgr,PPSMC_MSG_DRV_DRAM_ADDR_LO ,lower_32_bits (smu_data->header_buffer.mc_addr));