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soc: imx: gpc: clean up

PATCH Applied Sven Schmitt 2 participants 2 messages Jul 24, 2018 Arm i.MX and Layerscape

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#0 lore raw

PATCH v3 2/3 soc: imx: gpc: clean up

Remove unused #defines.

---
 drivers/soc/imx/gpc.c | 4 ----
 1 file changed, 4 deletions(-)
drivers/soc/imx/gpc.c +0 -4
index 5126185e68c6..35cc1d2dc4d5 100644
@@ -24,15 +24,11 @@
 #define GPC_PGC_CTRL_OFFS	0x0
 #define GPC_PGC_PUPSCR_OFFS	0x4
 #define GPC_PGC_PDNSCR_OFFS	0x8
-#define GPC_PGC_SW2ISO_SHIFT	0x8
-#define GPC_PGC_SW_SHIFT	0x0
 
 #define GPC_PGC_PCI_PDN		0x200
 #define GPC_PGC_PCI_SR		0x20c
 
 #define GPC_PGC_GPU_PDN		0x260
-#define GPC_PGC_GPU_PUPSCR	0x264
-#define GPC_PGC_GPU_PDNSCR	0x268
 #define GPC_PGC_GPU_SR		0x26c
 
 #define GPC_PGC_DISP_PDN	0x240
Signature · 1 line
2.17.1
#1 lore raw
Quoted 1 line · Sven Schmitt

Remove unused #defines.

This should be the title of the patch, "clean up" is too vague.

drivers/soc/imx/gpc.c line 28

Quoted 8 lines
drivers/soc/imx/gpc.c +0 -2
@@ -24,15 +24,11 @@
 #define GPC_PGC_CTRL_OFFS	0x0
 #define GPC_PGC_PUPSCR_OFFS	0x4
 #define GPC_PGC_PDNSCR_OFFS	0x8
-#define GPC_PGC_SW2ISO_SHIFT	0x8
-#define GPC_PGC_SW_SHIFT	0x0

It would be cleaner if you used these defines when reading the sw/iso values.

drivers/soc/imx/gpc.c line 32

Quoted 8 lines
drivers/soc/imx/gpc.c +0 -2
 #define GPC_PGC_PCI_PDN		0x200
 #define GPC_PGC_PCI_SR		0x20c
 
 #define GPC_PGC_GPU_PDN		0x260
-#define GPC_PGC_GPU_PUPSCR	0x264
-#define GPC_PGC_GPU_PDNSCR	0x268
 #define GPC_PGC_GPU_SR		0x26c

Each PGC has a fixed size and layout, maybe we could just have defines for the offset of the PGC? It would be somewhat similar to gpcv2