FAILED: patch "[PATCH] mmc: renesas_sdhi: limit block count to 16 bit for old" failed to apply to 4.14-stable tree

PATCH [email protected] 1 participant 1 message Mar 24, 2019

Subsystems (3)

Stable branch MMC, SD and SDIO TMIO/SDHI MMC driver

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2019-03-24 19:53 UTC #0 lore raw

The patch below does not apply to the 4.14-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From c9a9497ccef205ed4ed2e247011382627876d831 Mon Sep 17 00:00:00 2001
From: Wolfram Sang <[email protected]>
Date: Tue, 19 Mar 2019 11:12:59 +0100
Subject: [PATCH] mmc: renesas_sdhi: limit block count to 16 bit for old
revisions

R-Car Gen2 has two different SDHI incarnations in the same chip. The older one does not support the recently introduced 32 bit register access to the block count register. Make sure we use this feature only after the first known version.

Thanks to the Renesas Testing team for this bug report!

Fixes 5603731a15ef ("mmc: tmio: fix access width of Block Count Register")

Reported-by Yoshihiro Shimoda <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

Reviewed-by Simon Horman <[email protected]>

Tested-by Phong Hoang <[email protected]>

Cc [email protected]

Signed-off-by Ulf Hansson <[email protected]>

drivers/mmc/host/renesas_sdhi_core.c +7 -1

index 71e13844df6c..8742e27e4e8b 100644
@@ -641,6 +641,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
 	struct renesas_sdhi *priv;
 	struct resource *res;
 	int irq, ret, i;
+	u16 ver;
 
 	of_data = of_device_get_match_data(&pdev->dev);

@@ -773,12 +774,17 @@ int renesas_sdhi_probe(struct platform_device *pdev,
 	if (ret)
 		goto efree;
 
+	ver = sd_ctrl_read16(host, CTL_VERSION);
+	/* GEN2_SDR104 is first known SDHI to use 32bit block count */
+	if (ver < SDHI_VER_GEN2_SDR104 && mmc_data->max_blk_count > U16_MAX)
+		mmc_data->max_blk_count = U16_MAX;
+
 	ret = tmio_mmc_host_probe(host);
 	if (ret < 0)
 		goto edisclk;
 
 	/* One Gen2 SDHI incarnation does NOT have a CBSY bit */
-	if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN2_SDR50)
+	if (ver == SDHI_VER_GEN2_SDR50)
 		mmc_data->flags &= ~TMIO_MMC_HAVE_CBSY;
 
 	/* Enable tuning iff we have an SCC and a supported mode */