Skip to contentSkip to conversation

: ARM-Cortex-Tune: Add 2 kinds of ARM-Cortex-Tune

yocto New [email protected] 1 participant 3 messages Aug 29, 2019

lore
Share & tools
lore

[email protected]

author
#0 lore raw

From: Limeng <[email protected]>

Recently, I am working on renesas-rcar platform based on yocto-2.7, and I found there are no arm-cortexa57 and arm-cortexa57-cortexa53 tunes for some Renesas SoC.
Therefore, add 2 kinds of ARM-Cortex-Tune.

Detail patches as below:

0001-tune-cortexa57-cortexa53-add-tunes-for-ARM-Cortex-A5.patch 0002-tune-cortexa57-add-tunes-for-ARM-Cortex-A57.patch

 tune-cortexa57-cortexa53.inc |   18 ++++++++++++++++++
 tune-cortexa57.inc           |   18 ++++++++++++++++++
 2 files changed, 36 insertions(+)

thanks,
Limeng

author
#1 lore raw

PATCH 1/2 tune-cortexa57-cortexa53: add tunes for ARM Cortex-A53-Cortex-A57

From: Limeng <[email protected]>

commit 3613b2780a6b5d5d70ea6802be5060a8214cbdb5 from
git://github.com/renesas-rcar/meta-renesas

There are 2 types cores in renesas rcar SoC H3/M3, so add a tune for ARM Cortex-A53-Cortex-A57.

Signed-off-by Meng Li <[email protected]>
---
 .../include/tune-cortexa57-cortexa53.inc       | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 meta/conf/machine/include/tune-cortexa57-cortexa53.inc
meta/conf/machine/include/tune-cortexa57-cortexa53.inc new file +18 -0
new file mode 100644
index 0000000000..d05e93f51e
@@ -0,0 +1,18 @@
+DEFAULTTUNE ?= "cortexa57-cortexa53"
+require conf/machine/include/arm/arch-armv8a.inc
+
+TUNEVALID[cortexa57-cortexa53] = "Enable big.LITTLE Cortex-A57.Cortex-A53 specific processor optimizations"
+TUNECONFLICTS[aarch64] = "armv4 armv5 armv6 armv7 armv7a"
+
+TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "aarch64", " -march=armv8-a", "" ,d)}"
+
+MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa57-cortexa53", "cortexa57-cortexa53:", "" ,d)}"
+
+TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa57-cortexa53", " -mtune=cortex-a57.cortex-a53", "", d)}"
+
+# Little Endian base configs
+AVAILTUNES += "cortexa57-cortexa53"
+ARMPKGARCH_tune-cortexa57-cortexa53 = "cortexa57-cortexa53"
+TUNE_FEATURES_tune-cortexa57-cortexa53 = "${TUNE_FEATURES_tune-aarch64} cortexa57-cortexa53"
+PACKAGE_EXTRA_ARCHS_tune-cortexa57-cortexa53 = "${PACKAGE_EXTRA_ARCHS_tune-aarch64} cortexa57-cortexa53"
+BASE_LIB_tune-cortexa57-cortexa53 = "lib64"
Signature · 1 line
2.18.1
author
#2 lore raw

PATCH 2/2 tune-cortexa57: add tunes for ARM Cortex-A57

In reply to [email protected]

From: Limeng <[email protected]>

commit 3613b2780a6b5d5d70ea6802be5060a8214cbdb5 from
git://github.com/renesas-rcar/meta-renesas

Signed-off-by Meng Li <[email protected]>
---
 meta/conf/machine/include/tune-cortexa57.inc | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 meta/conf/machine/include/tune-cortexa57.inc
meta/conf/machine/include/tune-cortexa57.inc new file +18 -0
new file mode 100644
index 0000000000..4a458948e6
@@ -0,0 +1,18 @@
+DEFAULTTUNE ?= "cortexa57"
+require conf/machine/include/arm/arch-armv8a.inc
+
+TUNEVALID[cortexa57] = "Enable Cortex-A57 specific processor optimizations"
+TUNECONFLICTS[aarch64] = "armv4 armv5 armv6 armv7 armv7a"
+
+TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "aarch64", " -march=armv8-a", "" ,d)}"
+
+MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa57", "cortexa57:", "" ,d)}"
+
+TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa57", " -mtune=cortex-a57", "", d)}"
+
+# Little Endian base configs
+AVAILTUNES += "cortexa57"
+ARMPKGARCH_tune-cortexa57 = "cortexa57"
+TUNE_FEATURES_tune-cortexa57 = "${TUNE_FEATURES_tune-aarch64} cortexa57"
+PACKAGE_EXTRA_ARCHS_tune-cortexa57 = "${PACKAGE_EXTRA_ARCHS_tune-aarch64} cortexa57"
+BASE_LIB_tune-cortexa57 = "lib64"
Signature · 1 line
2.18.1