Skip to contentSkip to conversation

Add QUSB2 PHY support for SC7180

PATCH Superseded Sandeep Maheswaram 2 participants 4 messages Oct 31, 2019 – Nov 4, 2019

Subsystems (3)
Device tree bindings Arm Qualcomm mailing list Generic PHY framework

v1 of 7 Superseded Latest is v7 →

lore
Share & tools
lore

Sandeep Maheswaram

author
#0 lore raw

cover Add QUSB2 PHY support for SC7180

Add QUSB2 PHY support for SC7180 in phy driver and device tree bindings

Sandeep Maheswaram (2):
phy: qcom-qusb2: Add QUSB2 PHY support for SC7180
dt-bindings: phy-qcom-qusb2: Add SC7180 QUSB2 phy support

 .../devicetree/bindings/phy/qcom-qusb2-phy.txt     |  9 ++--
 drivers/phy/qualcomm/phy-qcom-qusb2.c              | 53 +++++++++++++++++++++-
 2 files changed, 57 insertions(+), 5 deletions(-)
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
author
#1 lore raw

PATCH 1/2 phy: qcom-qusb2: Add QUSB2 PHY support for SC7180

Add QUSB2 PHY config data and compatible for SC7180.

Signed-off-by Sandeep Maheswaram <[email protected]>
---
 drivers/phy/qualcomm/phy-qcom-qusb2.c | 53 ++++++++++++++++++++++++++++++++++-
 1 file changed, 52 insertions(+), 1 deletion(-)
drivers/phy/qualcomm/phy-qcom-qusb2.c +52 -1
index bf94a52..929875c 100644
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
  */
 
 #include <linux/clk.h>

@@ -212,6 +212,41 @@ static const struct qusb2_phy_init_tbl sdm845_init_tbl[] = {
 	QUSB2_PHY_INIT_CFG(QUSB2PHY_CHG_CTRL2, 0x0),
 };
 
+static const unsigned int sc7180_regs_layout[] = {
+	[QUSB2PHY_PLL_CORE_INPUT_OVERRIDE] = 0xa8,
+	[QUSB2PHY_PLL_STATUS]		= 0x1a0,
+	[QUSB2PHY_PORT_TUNE1]		= 0x240,
+	[QUSB2PHY_PORT_TUNE2]		= 0x244,
+	[QUSB2PHY_PORT_TUNE3]		= 0x248,
+	[QUSB2PHY_PORT_TUNE4]		= 0x24c,
+	[QUSB2PHY_PORT_TUNE5]		= 0x250,
+	[QUSB2PHY_PORT_TEST1]		= 0x254,
+	[QUSB2PHY_PORT_TEST2]		= 0x258,
+	[QUSB2PHY_PORT_POWERDOWN]	= 0x210,
+	[QUSB2PHY_INTR_CTRL]		= 0x230,
+};
+
+static const struct qusb2_phy_init_tbl sc7180_init_tbl[] = {
+	QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_ANALOG_CONTROLS_TWO, 0x03),
+	QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_CLOCK_INVERTERS, 0x7c),
+	QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_CMODE, 0x80),
+	QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_LOCK_DELAY, 0x0a),
+	QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_DIGITAL_TIMERS_TWO, 0x19),
+	QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_BIAS_CONTROL_1, 0x40),
+	QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_BIAS_CONTROL_2, 0x22),
+	QUSB2_PHY_INIT_CFG(QUSB2PHY_PWR_CTRL2, 0x21),
+	QUSB2_PHY_INIT_CFG(QUSB2PHY_IMP_CTRL1, 0x08),
+	QUSB2_PHY_INIT_CFG(QUSB2PHY_IMP_CTRL2, 0x58),
+
+	QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0xc5),
+	QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0x29),
+	QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE3, 0xca),
+	QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE4, 0x04),
+	QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE5, 0x03),
+
+	QUSB2_PHY_INIT_CFG(QUSB2PHY_CHG_CTRL2, 0x30),
+};
+
 struct qusb2_phy_cfg {
 	const struct qusb2_phy_init_tbl *tbl;
 	/* number of entries in the table */

@@ -271,6 +306,19 @@ static const struct qusb2_phy_cfg sdm845_phy_cfg = {
 	.update_tune1_with_efuse = true,
 };
 
+static const struct qusb2_phy_cfg sc7180_phy_cfg = {
+	.tbl		= sc7180_init_tbl,
+	.tbl_num	= ARRAY_SIZE(sc7180_init_tbl),
+	.regs		= sc7180_regs_layout,
+
+	.disable_ctrl	= (PWR_CTRL1_VREF_SUPPLY_TRIM | PWR_CTRL1_CLAMP_N_EN |
+			   POWER_DOWN),
+	.mask_core_ready = CORE_READY_STATUS,
+	.has_pll_override = true,
+	.autoresume_en	  = BIT(0),
+	.update_tune1_with_efuse = true,
+};
+
 static const char * const qusb2_phy_vreg_names[] = {
 	"vdda-pll", "vdda-phy-dpdm",
 };

@@ -776,6 +824,9 @@ static const struct of_device_id qusb2_phy_of_match_table[] = {
 	}, {
 		.compatible	= "qcom,sdm845-qusb2-phy",
 		.data		= &sdm845_phy_cfg,
+	}, {
+		.compatible	= "qcom,sc7180-qusb2-phy",
+		.data		= &sc7180_phy_cfg,
 	},
 	{ },
 };
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
author
#2 lore raw

PATCH 2/2 dt-bindings: phy-qcom-qusb2: Add SC7180 QUSB2 phy support

In reply to Sandeep Maheswaram

Add QUSB2 phy entries for SC7180 in device tree bindings.

Signed-off-by Sandeep Maheswaram <[email protected]>
---
 Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)
Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt +5 -4
index fe29f9e..d46fca7 100644
@@ -8,6 +8,7 @@ Required properties:
 	       "qcom,msm8996-qusb2-phy" for 14nm PHY on msm8996,
 	       "qcom,msm8998-qusb2-phy" for 10nm PHY on msm8998,
 	       "qcom,sdm845-qusb2-phy" for 10nm PHY on sdm845.
+	       "qcom,sc7180-qusb2-phy" for 8nm PHY on sc7180.
 
  - reg: offset and length of the PHY register set.
  - #phy-cells: must be 0.

@@ -31,23 +32,23 @@ Optional properties:
  - qcom,imp-res-offset-value: It is a 6 bit value that specifies offset to be
 		added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY
 		tuning parameter that may vary for different boards of same SOC.
-		This property is applicable to only QUSB2 v2 PHY (sdm845).
+		This property is applicable to only QUSB2 v2 PHY (sdm845,sc7180).
  - qcom,hstx-trim-value: It is a 4 bit value that specifies tuning for HSTX
 		output current.
 		Possible range is - 15mA to 24mA (stepsize of 600 uA).
 		See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
-		This property is applicable to only QUSB2 v2 PHY (sdm845).
+		This property is applicable to only QUSB2 v2 PHY (sdm845,sc7180).
 		Default value is 22.2mA for sdm845.
  - qcom,preemphasis-level: It is a 2 bit value that specifies pre-emphasis level.
 		Possible range is 0 to 15% (stepsize of 5%).
 		See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
-		This property is applicable to only QUSB2 v2 PHY (sdm845).
+		This property is applicable to only QUSB2 v2 PHY (sdm845,sc7180).
 		Default value is 10% for sdm845.
 - qcom,preemphasis-width: It is a 1 bit value that specifies how long the HSTX
 		pre-emphasis (specified using qcom,preemphasis-level) must be in
 		effect. Duration could be half-bit of full-bit.
 		See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
-		This property is applicable to only QUSB2 v2 PHY (sdm845).
+		This property is applicable to only QUSB2 v2 PHY (sdm845,sc7180).
 		Default value is full-bit width for sdm845.
 
 Example:
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
#3 lore raw

Re: [PATCH 2/2] dt-bindings: phy-qcom-qusb2: Add SC7180 QUSB2 phy support

Quoting Sandeep Maheswaram (2019-10-30 22:38:07)

Quoted 6 lines

Add QUSB2 phy entries for SC7180 in device tree bindings.

Signed-off-by Sandeep Maheswaram <[email protected]>
---
 Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

Can you convert this binding to YAML? It may make it easier to understand what compatibles have certain properties.

Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt Required properties: · line 11

Quoted 10 lines
Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt +1 -0
index fe29f9e..d46fca7 100644
@@ -8,6 +8,7 @@ Required properties:
               "qcom,msm8996-qusb2-phy" for 14nm PHY on msm8996,
               "qcom,msm8998-qusb2-phy" for 10nm PHY on msm8998,
               "qcom,sdm845-qusb2-phy" for 10nm PHY on sdm845.
+              "qcom,sc7180-qusb2-phy" for 8nm PHY on sc7180.

Please sort compatible string here.

Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt Optional properties: · line 35

Quoted 9 lines
Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt +1 -1
  - reg: offset and length of the PHY register set.
  - #phy-cells: must be 0.

@@ -31,23 +32,23 @@ Optional properties:
  - qcom,imp-res-offset-value: It is a 6 bit value that specifies offset to be
                added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY
                tuning parameter that may vary for different boards of same SOC.
-               This property is applicable to only QUSB2 v2 PHY (sdm845).
+               This property is applicable to only QUSB2 v2 PHY (sdm845,sc7180).

Put a space after that comma please.

Quoted 11 lines
Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt +1 -2
  - qcom,hstx-trim-value: It is a 4 bit value that specifies tuning for HSTX
                output current.
                Possible range is - 15mA to 24mA (stepsize of 600 uA).
                See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
-               This property is applicable to only QUSB2 v2 PHY (sdm845).
+               This property is applicable to only QUSB2 v2 PHY (sdm845,sc7180).
                Default value is 22.2mA for sdm845.
  - qcom,preemphasis-level: It is a 2 bit value that specifies pre-emphasis level.
                Possible range is 0 to 15% (stepsize of 5%).
                See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
-               This property is applicable to only QUSB2 v2 PHY (sdm845).

Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt Optional properties: · line 53

Quoted 10 lines
Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt +2 -1
+               This property is applicable to only QUSB2 v2 PHY (sdm845,sc7180).
                Default value is 10% for sdm845.
 - qcom,preemphasis-width: It is a 1 bit value that specifies how long the HSTX
                pre-emphasis (specified using qcom,preemphasis-level) must be in
                effect. Duration could be half-bit of full-bit.
                See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
-               This property is applicable to only QUSB2 v2 PHY (sdm845).
+               This property is applicable to only QUSB2 v2 PHY (sdm845,sc7180).
                Default value is full-bit width for sdm845.

Same comment.