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dt-bindings: clk: qcom: Add support for GPU GX GDSCR

PATCH Applied Taniya Das 3 participants 7 messages Feb 10, 2020 – Feb 12, 2020

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Taniya Das

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#0 lore raw

PATCH v2 1/2 dt-bindings: clk: qcom: Add support for GPU GX GDSCR

In the cases where the GPU SW requires to use the GX GDSCR add support for the same.

---
 include/dt-bindings/clock/qcom,gpucc-sc7180.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
include/dt-bindings/clock/qcom,gpucc-sc7180.h +2 -1
index 0e4643b..65e706d 100644
@@ -15,7 +15,8 @@
 #define GPU_CC_CXO_CLK			6
 #define GPU_CC_GMU_CLK_SRC		7
 
-/* CAM_CC GDSCRs */
+/* GPU_CC GDSCRs */
 #define CX_GDSC				0
+#define GX_GDSC				1
 
 #endif
Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member
of the Code Aurora Forum, hosted by the  Linux Foundation.
author
#1 lore raw

PATCH v2 2/2 clk: qcom: gpucc: Add support for GX GDSC for SC7180

Most of the time the CPU should not be touching the GX domain on the GPU except for a very special use case when the CPU needs to force the GX headswitch off. Add the GX domain for that use case. As part of this add a dummy enable function for the GX gdsc to simulate success so that the pm_runtime reference counting is correct. This matches what was done in sdm845 in commit 85a3d920d30a ("clk: qcom: Add a dummy enable function for GX gdsc").

---
 drivers/clk/qcom/gpucc-sc7180.c | 37 +++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)
drivers/clk/qcom/gpucc-sc7180.c +37 -0
index a96c0b9..7b656b6 100644
@@ -170,8 +170,45 @@ static struct gdsc cx_gdsc = {
 	.flags = VOTABLE,
 };
 
+/*
+ * On SC7180 the GPU GX domain is *almost* entirely controlled by the GMU
+ * running in the CX domain so the CPU doesn't need to know anything about the
+ * GX domain EXCEPT....
+ *
+ * Hardware constraints dictate that the GX be powered down before the CX. If
+ * the GMU crashes it could leave the GX on. In order to successfully bring back
+ * the device the CPU needs to disable the GX headswitch. There being no sane
+ * way to reach in and touch that register from deep inside the GPU driver we
+ * need to set up the infrastructure to be able to ensure that the GPU can
+ * ensure that the GX is off during this super special case. We do this by
+ * defining a GX gdsc with a dummy enable function and a "default" disable
+ * function.
+ *
+ * This allows us to attach with genpd_dev_pm_attach_by_name() in the GPU
+ * driver. During power up, nothing will happen from the CPU (and the GMU will
+ * power up normally but during power down this will ensure that the GX domain
+ * is *really* off - this gives us a semi standard way of doing what we need.
+ */
+static int gx_gdsc_enable(struct generic_pm_domain *domain)
+{
+	/* Do nothing but give genpd the impression that we were successful */
+	return 0;
+}
+
+static struct gdsc gx_gdsc = {
+	.gdscr = 0x100c,
+	.clamp_io_ctrl = 0x1508,
+	.pd = {
+		.name = "gx_gdsc",
+		.power_on = gx_gdsc_enable,
+	},
+	.pwrsts = PWRSTS_OFF_ON,
+	.flags = CLAMP_IO,
+};
+
 static struct gdsc *gpu_cc_sc7180_gdscs[] = {
 	[CX_GDSC] = &cx_gdsc,
+	[GX_GDSC] = &gx_gdsc,
 };
 
 static struct clk_regmap *gpu_cc_sc7180_clocks[] = {

--
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.

#2 lore raw

Re: [PATCH v2 2/2] clk: qcom: gpucc: Add support for GX GDSC for SC7180

Hi,

Quoted 11 lines · Taniya Das

Most of the time the CPU should not be touching the GX domain on the GPU except for a very special use case when the CPU needs to force the GX headswitch off. Add the GX domain for that use case. As part of this add a dummy enable function for the GX gdsc to simulate success so that the pm_runtime reference counting is correct. This matches what was done in sdm845 in commit 85a3d920d30a ("clk: qcom: Add a dummy enable function for GX gdsc").

For future reference, if you have someone's tag in your commit message it's nice to CC them on the email.

Quoted 36 lines
---
 drivers/clk/qcom/gpucc-sc7180.c | 37 +++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)
drivers/clk/qcom/gpucc-sc7180.c +24 -0
index a96c0b9..7b656b6 100644
@@ -170,8 +170,45 @@ static struct gdsc cx_gdsc = {
        .flags = VOTABLE,
 };
 
+/*
+ * On SC7180 the GPU GX domain is *almost* entirely controlled by the GMU
+ * running in the CX domain so the CPU doesn't need to know anything about the
+ * GX domain EXCEPT....
+ *
+ * Hardware constraints dictate that the GX be powered down before the CX. If
+ * the GMU crashes it could leave the GX on. In order to successfully bring back
+ * the device the CPU needs to disable the GX headswitch. There being no sane
+ * way to reach in and touch that register from deep inside the GPU driver we
+ * need to set up the infrastructure to be able to ensure that the GPU can
+ * ensure that the GX is off during this super special case. We do this by
+ * defining a GX gdsc with a dummy enable function and a "default" disable
+ * function.
+ *
+ * This allows us to attach with genpd_dev_pm_attach_by_name() in the GPU
+ * driver. During power up, nothing will happen from the CPU (and the GMU will
+ * power up normally but during power down this will ensure that the GX domain
+ * is *really* off - this gives us a semi standard way of doing what we need.
+ */
+static int gx_gdsc_enable(struct generic_pm_domain *domain)
+{
+       /* Do nothing but give genpd the impression that we were successful */
+       return 0;
+}

drivers/clk/qcom/gpucc-sc7180.c static struct gdsc cx_gdsc = { · line 206

Quoted 10 lines
drivers/clk/qcom/gpucc-sc7180.c +10 -0
+
+static struct gdsc gx_gdsc = {
+       .gdscr = 0x100c,
+       .clamp_io_ctrl = 0x1508,
+       .pd = {
+               .name = "gx_gdsc",
+               .power_on = gx_gdsc_enable,
+       },
+       .pwrsts = PWRSTS_OFF_ON,
+       .flags = CLAMP_IO,

In my previous reply [1], I asked about these flags and if it was intentional that they were different from sdm845. I did see a private response, but no public one. In the future note that it's good to reply publicly so everyone understands what happened. In this case, I was told "the GDSC's on 845 and SC7180 are different and hence the change in flags is expected". That answers my question and thus I'm fine with my tag being here. It also looks like you took my other review feedback on v1, which is nice.

-Doug

[1] https://lore.kernel.org/r/CAD=FV=V6yM7UJwu0ZLPCqmDgV9FS4=g+wcLg0TV51b72zvWT9Q@mail.gmail.com

author
#3 lore raw

Re: [PATCH v2 2/2] clk: qcom: gpucc: Add support for GX GDSC for SC7180

Hi Doug,

Quoted 12 lines · Doug Anderson

Hi,

Quoted 9 lines · Taniya Das

Most of the time the CPU should not be touching the GX domain on the GPU except for a very special use case when the CPU needs to force the GX headswitch off. Add the GX domain for that use case. As part of this add a dummy enable function for the GX gdsc to simulate success so that the pm_runtime reference counting is correct. This matches what was done in sdm845 in commit 85a3d920d30a ("clk: qcom: Add a dummy enable function for GX gdsc").

Quoted 7 lines
Quoted 2 lines

For future reference, if you have someone's tag in your commit message it's nice to CC them on the email.

My bad my miss.

Quoted 57 lines
Quoted 36 lines
---
  drivers/clk/qcom/gpucc-sc7180.c | 37 +++++++++++++++++++++++++++++++++++++
  1 file changed, 37 insertions(+)
drivers/clk/qcom/gpucc-sc7180.c +24 -0
index a96c0b9..7b656b6 100644
@@ -170,8 +170,45 @@ static struct gdsc cx_gdsc = {
         .flags = VOTABLE,
  };
 
+/*
+ * On SC7180 the GPU GX domain is *almost* entirely controlled by the GMU
+ * running in the CX domain so the CPU doesn't need to know anything about the
+ * GX domain EXCEPT....
+ *
+ * Hardware constraints dictate that the GX be powered down before the CX. If
+ * the GMU crashes it could leave the GX on. In order to successfully bring back
+ * the device the CPU needs to disable the GX headswitch. There being no sane
+ * way to reach in and touch that register from deep inside the GPU driver we
+ * need to set up the infrastructure to be able to ensure that the GPU can
+ * ensure that the GX is off during this super special case. We do this by
+ * defining a GX gdsc with a dummy enable function and a "default" disable
+ * function.
+ *
+ * This allows us to attach with genpd_dev_pm_attach_by_name() in the GPU
+ * driver. During power up, nothing will happen from the CPU (and the GMU will
+ * power up normally but during power down this will ensure that the GX domain
+ * is *really* off - this gives us a semi standard way of doing what we need.
+ */
+static int gx_gdsc_enable(struct generic_pm_domain *domain)
+{
+       /* Do nothing but give genpd the impression that we were successful */
+       return 0;
+}

drivers/clk/qcom/gpucc-sc7180.c static struct gdsc cx_gdsc = { · line 206

Quoted 10 lines
drivers/clk/qcom/gpucc-sc7180.c +10 -0
+
+static struct gdsc gx_gdsc = {
+       .gdscr = 0x100c,
+       .clamp_io_ctrl = 0x1508,
+       .pd = {
+               .name = "gx_gdsc",
+               .power_on = gx_gdsc_enable,
+       },
+       .pwrsts = PWRSTS_OFF_ON,
+       .flags = CLAMP_IO,

In my previous reply [1], I asked about these flags and if it was intentional that they were different from sdm845. I did see a private response, but no public one. In the future note that it's good to reply publicly so everyone understands what happened. In this case, I was told "the GDSC's on 845 and SC7180 are different and hence the change in flags is expected". That answers my question and thus I'm fine with my tag being here. It also looks like you took my other review feedback on v1, which is nice.

Quoted 2 lines

-Doug

I am unable to respond to the other thread, thus we put out the reply.

Quoted 3 lines

[1] https://lore.kernel.org/r/CAD=FV=V6yM7UJwu0ZLPCqmDgV9FS4=g+wcLg0TV51b72zvWT9Q@mail.gmail.com

Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.

--
maintainer Applied
#4 lore raw

Re: [PATCH v2 2/2] clk: qcom: gpucc: Add support for GX GDSC for SC7180

In reply to Taniya Das

Quoting Taniya Das (2020-02-09 20:01:06)

Quoted 11 lines

Most of the time the CPU should not be touching the GX domain on the GPU except for a very special use case when the CPU needs to force the GX headswitch off. Add the GX domain for that use case. As part of this add a dummy enable function for the GX gdsc to simulate success so that the pm_runtime reference counting is correct. This matches what was done in sdm845 in commit 85a3d920d30a ("clk: qcom: Add a dummy enable function for GX gdsc").

---

Applied to clk-next

Reviewed-by on v2 1/2
#5 lore raw
In reply to Taniya Das

Hi,

Quoted 8 lines · Taniya Das

In the cases where the GPU SW requires to use the GX GDSCR add support for the same.

---
 include/dt-bindings/clock/qcom,gpucc-sc7180.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

I already added my tag to this exact same patch in:

https://lore.kernel.org/linux-arm-msm/CAD=FV=VeMaKq3KR=t7dbG+VyVs5DS=gHasSdJQSqNQreTUoZig@mail.gmail.com/

Please make sure to carry forward tags unless something major has changed. In any case, re-adding my tag: